{"id":"https://openalex.org/W4411725561","doi":"https://doi.org/10.1109/iscas56072.2025.11044076","title":"Multi-Bit Flip-Flop Based Timing and Power Optimization under Advanced Technology Nodes","display_name":"Multi-Bit Flip-Flop Based Timing and Power Optimization under Advanced Technology Nodes","publication_year":2025,"publication_date":"2025-05-25","ids":{"openalex":"https://openalex.org/W4411725561","doi":"https://doi.org/10.1109/iscas56072.2025.11044076"},"language":"en","primary_location":{"id":"doi:10.1109/iscas56072.2025.11044076","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas56072.2025.11044076","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Tingxuan Gong","orcid":null},"institutions":[{"id":"https://openalex.org/I80947539","display_name":"Fuzhou University","ror":"https://ror.org/011xvna82","country_code":"CN","type":"education","lineage":["https://openalex.org/I80947539"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Tingxuan Gong","raw_affiliation_strings":["Fuzhou University,Center for Discrete Mathematics and Theoretical Computer Science,Fuzhou,China,350108"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Fuzhou University,Center for Discrete Mathematics and Theoretical Computer Science,Fuzhou,China,350108","institution_ids":["https://openalex.org/I80947539"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Wenxu Ruan","orcid":null},"institutions":[{"id":"https://openalex.org/I80947539","display_name":"Fuzhou University","ror":"https://ror.org/011xvna82","country_code":"CN","type":"education","lineage":["https://openalex.org/I80947539"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Wenxu Ruan","raw_affiliation_strings":["Fuzhou University,Center for Discrete Mathematics and Theoretical Computer Science,Fuzhou,China,350108"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Fuzhou University,Center for Discrete Mathematics and Theoretical Computer Science,Fuzhou,China,350108","institution_ids":["https://openalex.org/I80947539"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Dongwei Tan","orcid":null},"institutions":[{"id":"https://openalex.org/I80947539","display_name":"Fuzhou University","ror":"https://ror.org/011xvna82","country_code":"CN","type":"education","lineage":["https://openalex.org/I80947539"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Dongwei Tan","raw_affiliation_strings":["Fuzhou University,Center for Discrete Mathematics and Theoretical Computer Science,Fuzhou,China,350108"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Fuzhou University,Center for Discrete Mathematics and Theoretical Computer Science,Fuzhou,China,350108","institution_ids":["https://openalex.org/I80947539"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039243374","display_name":"Zhendong He","orcid":"https://orcid.org/0000-0003-3169-3113"},"institutions":[{"id":"https://openalex.org/I80947539","display_name":"Fuzhou University","ror":"https://ror.org/011xvna82","country_code":"CN","type":"education","lineage":["https://openalex.org/I80947539"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhendong He","raw_affiliation_strings":["Fuzhou University,Center for Discrete Mathematics and Theoretical Computer Science,Fuzhou,China,350108"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Fuzhou University,Center for Discrete Mathematics and Theoretical Computer Science,Fuzhou,China,350108","institution_ids":["https://openalex.org/I80947539"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101664594","display_name":"Zhifeng Lin","orcid":"https://orcid.org/0000-0002-4597-4322"},"institutions":[{"id":"https://openalex.org/I80947539","display_name":"Fuzhou University","ror":"https://ror.org/011xvna82","country_code":"CN","type":"education","lineage":["https://openalex.org/I80947539"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhifeng Lin","raw_affiliation_strings":["Fuzhou University,Center for Discrete Mathematics and Theoretical Computer Science,Fuzhou,China,350108"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Fuzhou University,Center for Discrete Mathematics and Theoretical Computer Science,Fuzhou,China,350108","institution_ids":["https://openalex.org/I80947539"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101854580","display_name":"Jianli Chen","orcid":"https://orcid.org/0000-0002-1391-2696"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jianli Chen","raw_affiliation_strings":["Fudan University,School of Microelectronics,Shanghai,China,200433"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Fudan University,School of Microelectronics,Shanghai,China,200433","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.11370015,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9894999861717224,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9858999848365784,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/flip-flop","display_name":"Flip-flop","score":0.8116679787635803},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.731930136680603},{"id":"https://openalex.org/keywords/bit","display_name":"Bit (key)","score":0.6805046796798706},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5103780627250671},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4842543303966522},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.38783296942710876},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.24429115653038025},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.12207064032554626}],"concepts":[{"id":"https://openalex.org/C2781007278","wikidata":"https://www.wikidata.org/wiki/Q183406","display_name":"Flip-flop","level":3,"score":0.8116679787635803},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.731930136680603},{"id":"https://openalex.org/C117011727","wikidata":"https://www.wikidata.org/wiki/Q1278488","display_name":"Bit (key)","level":2,"score":0.6805046796798706},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5103780627250671},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4842543303966522},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.38783296942710876},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.24429115653038025},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.12207064032554626},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C162307627","wikidata":"https://www.wikidata.org/wiki/Q204833","display_name":"Enhanced Data Rates for GSM Evolution","level":2,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas56072.2025.11044076","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas56072.2025.11044076","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.7400000095367432}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1967661769","https://openalex.org/W2070853264","https://openalex.org/W2095166045","https://openalex.org/W2177780683","https://openalex.org/W2404274178","https://openalex.org/W2535521862","https://openalex.org/W2974218441","https://openalex.org/W4399486107","https://openalex.org/W6668990524","https://openalex.org/W6847738532"],"related_works":["https://openalex.org/W2132046218","https://openalex.org/W2783525109","https://openalex.org/W4327546585","https://openalex.org/W4402040071","https://openalex.org/W4230846245","https://openalex.org/W2763646728","https://openalex.org/W2411923897","https://openalex.org/W4206433830","https://openalex.org/W2168373109","https://openalex.org/W4300456897"],"abstract_inverted_index":{"Multi-bit":[0],"flip-flops":[1,21],"(MBFFs)":[2],"are":[3],"widely":[4],"employed":[5],"in":[6],"modern":[7],"digital":[8],"design":[9],"due":[10],"to":[11,19,49,66,79],"their":[12],"reduced":[13],"power":[14,51],"and":[15,38,52],"area":[16],"consumption":[17],"compared":[18],"single-bit":[20],"(SBFFs).":[22],"In":[23],"this":[24],"paper,":[25],"we":[26,42,73],"present":[27,43],"an":[28],"MBFF-based":[29],"framework":[30],"that":[31,94],"simultaneously":[32],"optimizes":[33],"the":[34,68,82,87,90,99,103],"crucial":[35],"power,":[36],"area,":[37],"timing":[39,70],"metrics.":[40],"First,":[41],"a":[44,60,75],"mean":[45],"shift-based":[46],"clustering":[47],"algorithm":[48,97],"generate":[50],"area-friendly":[53],"clusters":[54],"while":[55],"considering":[56],"multiple":[57],"clocks.":[58],"Then,":[59],"feasible-region-based":[61],"declustering":[62],"method":[63],"is":[64],"developed":[65],"produce":[67],"desired":[69],"solution.":[71],"Finally,":[72],"propose":[74],"timing-aware":[76],"refinement":[77],"strategy":[78],"further":[80],"improve":[81],"solution":[83],"quality.":[84],"Compared":[85],"with":[86],"competitive":[88],"works,":[89],"experimental":[91],"results":[92],"show":[93],"our":[95],"proposed":[96],"achieves":[98],"best":[100],"performance":[101],"within":[102],"shortest":[104],"runtime.":[105]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}