{"id":"https://openalex.org/W4411725063","doi":"https://doi.org/10.1109/iscas56072.2025.11043974","title":"3D SRAM Disaggregation in Advanced CMOS Nodes using Hybrid Bonding Technology","display_name":"3D SRAM Disaggregation in Advanced CMOS Nodes using Hybrid Bonding Technology","publication_year":2025,"publication_date":"2025-05-25","ids":{"openalex":"https://openalex.org/W4411725063","doi":"https://doi.org/10.1109/iscas56072.2025.11043974"},"language":"en","primary_location":{"id":"doi:10.1109/iscas56072.2025.11043974","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas56072.2025.11043974","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5075949576","display_name":"Bhawana Kumari","orcid":"https://orcid.org/0000-0002-6665-749X"},"institutions":[{"id":"https://openalex.org/I4210114974","display_name":"IMEC","ror":"https://ror.org/02kcbn207","country_code":"BE","type":"nonprofit","lineage":["https://openalex.org/I4210114974"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Bhawana Kumari","raw_affiliation_strings":["IMEC,Leuven,Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IMEC,Leuven,Belgium","institution_ids":["https://openalex.org/I4210114974"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084201141","display_name":"Anurag Swarnkar","orcid":"https://orcid.org/0000-0001-9101-9847"},"institutions":[{"id":"https://openalex.org/I4210114974","display_name":"IMEC","ror":"https://ror.org/02kcbn207","country_code":"BE","type":"nonprofit","lineage":["https://openalex.org/I4210114974"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Anurag Swarnkar","raw_affiliation_strings":["IMEC,Leuven,Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IMEC,Leuven,Belgium","institution_ids":["https://openalex.org/I4210114974"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048531024","display_name":"Dawit Burusie Abdi","orcid":null},"institutions":[{"id":"https://openalex.org/I4210114974","display_name":"IMEC","ror":"https://ror.org/02kcbn207","country_code":"BE","type":"nonprofit","lineage":["https://openalex.org/I4210114974"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Dawit Abdi","raw_affiliation_strings":["IMEC,Leuven,Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IMEC,Leuven,Belgium","institution_ids":["https://openalex.org/I4210114974"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058982282","display_name":"Fernando Gar\u0107\u0131a-Redondo","orcid":"https://orcid.org/0000-0001-7090-8821"},"institutions":[{"id":"https://openalex.org/I4210147027","display_name":"Integrated Medicines (United Kingdom)","ror":"https://ror.org/0485zq002","country_code":"GB","type":"company","lineage":["https://openalex.org/I4210147027"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Fernando Garcia Redondo","raw_affiliation_strings":["IMEC,Cambridge,UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IMEC,Cambridge,UK","institution_ids":["https://openalex.org/I4210147027"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109885448","display_name":"James Myers","orcid":null},"institutions":[{"id":"https://openalex.org/I4210147027","display_name":"Integrated Medicines (United Kingdom)","ror":"https://ror.org/0485zq002","country_code":"GB","type":"company","lineage":["https://openalex.org/I4210147027"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"James Myers","raw_affiliation_strings":["IMEC,Cambridge,UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IMEC,Cambridge,UK","institution_ids":["https://openalex.org/I4210147027"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103112055","display_name":"Julien Ryckaert","orcid":"https://orcid.org/0009-0001-0140-3042"},"institutions":[{"id":"https://openalex.org/I4210114974","display_name":"IMEC","ror":"https://ror.org/02kcbn207","country_code":"BE","type":"nonprofit","lineage":["https://openalex.org/I4210114974"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Julien Ryckaert","raw_affiliation_strings":["IMEC,Leuven,Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IMEC,Leuven,Belgium","institution_ids":["https://openalex.org/I4210114974"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003048953","display_name":"Jaydeep P. Kulkarni","orcid":"https://orcid.org/0000-0002-0258-6776"},"institutions":[{"id":"https://openalex.org/I4210114974","display_name":"IMEC","ror":"https://ror.org/02kcbn207","country_code":"BE","type":"nonprofit","lineage":["https://openalex.org/I4210114974"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Jaydeep Kulkarni","raw_affiliation_strings":["IMEC,Leuven,Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IMEC,Leuven,Belgium","institution_ids":["https://openalex.org/I4210114974"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5060076901","display_name":"Dwaipayan Biswas","orcid":"https://orcid.org/0000-0001-7912-3692"},"institutions":[{"id":"https://openalex.org/I4210114974","display_name":"IMEC","ror":"https://ror.org/02kcbn207","country_code":"BE","type":"nonprofit","lineage":["https://openalex.org/I4210114974"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Dwaipayan Biswas","raw_affiliation_strings":["IMEC,Leuven,Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IMEC,Leuven,Belgium","institution_ids":["https://openalex.org/I4210114974"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.7897140979766846},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.760786771774292},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.5380759835243225},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5003643035888672},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3354129195213318},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.30067580938339233},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21653494238853455},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.18191301822662354}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7897140979766846},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.760786771774292},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.5380759835243225},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5003643035888672},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3354129195213318},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.30067580938339233},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21653494238853455},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.18191301822662354}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas56072.2025.11043974","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas56072.2025.11043974","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1998843050","https://openalex.org/W2013397418","https://openalex.org/W2023070535","https://openalex.org/W2086716781","https://openalex.org/W2143807959","https://openalex.org/W2611605980","https://openalex.org/W2735091875","https://openalex.org/W2912125486","https://openalex.org/W2948537294","https://openalex.org/W3005541871","https://openalex.org/W3088354098","https://openalex.org/W3110197395","https://openalex.org/W3136947505","https://openalex.org/W3175294142","https://openalex.org/W3211992815","https://openalex.org/W4226225869","https://openalex.org/W4317794255","https://openalex.org/W4400034163"],"related_works":["https://openalex.org/W1909296377","https://openalex.org/W2089002058","https://openalex.org/W3185029353","https://openalex.org/W2969498307","https://openalex.org/W3116379964","https://openalex.org/W2793465010","https://openalex.org/W2915176329","https://openalex.org/W2109445684","https://openalex.org/W2208608937","https://openalex.org/W2120018824"],"abstract_inverted_index":{"This":[0],"paper":[1],"studies":[2],"the":[3,24,28,62,72,82,95,103,109],"potential":[4],"of":[5,35,84,97],"hybrid":[6,67],"bonded":[7],"Array-under-CMOS":[8],"(AuC)":[9],"technology":[10,20,58,78,105],"to":[11,60,66,111],"partition":[12],"logic":[13,29,39,158],"and":[14,38,49,87,101,113,145,157],"high-performance":[15],"L1":[16],"cache":[17],"in":[18,131],"advanced":[19],"nodes.":[21],"By":[22],"decoupling":[23,155],"SRAM":[25,37,92,99],"bitcells":[26],"from":[27],"tier,":[30],"we":[31,80,107],"achieve":[32],"independent":[33],"optimization":[34,53],"both":[36],"devices,":[40],"as":[41,43],"well":[42],"back-end-of-line":[44],"(BEOL)":[45,143],"interconnects.":[46],"Heterogeneous":[47],"integration":[48,133],"BEOL":[50,100],"aspect":[51,116],"ratio":[52],"is":[54],"implemented":[55],"with":[56,76],"different":[57],"nodes":[59],"mitigate":[61],"delay":[63],"penalty":[64],"due":[65],"bond":[68],"pad":[69],"staggering.":[70],"Addressing":[71],"performance":[73,120,129],"degradation":[74],"associated":[75],"scaled":[77],"nodes,":[79],"investigate":[81],"impact":[83],"word-line":[85],"(WL)":[86],"bit-line":[88],"(BL)":[89],"resistance":[90],"on":[91],"performance.":[93],"Leveraging":[94],"flexibility":[96],"decoupled":[98],"within":[102],"AuC":[104,132],"framework,":[106],"explore":[108],"sensitivity":[110],"WL":[112],"BL":[114],"metal":[115],"ratios,":[117],"comparing":[118],"their":[119],"against":[121],"a":[122],"2D":[123],"baseline.":[124],"Our":[125],"results":[126],"demonstrate":[127],"substantial":[128],"improvements":[130],"through":[134],"two":[135],"key":[136],"approaches:":[137],"(1)":[138],"5%":[139],"enhancement":[140],"via":[141],"Back-End-of-Line":[142],"optimization,":[144],"(2)":[146],"25%":[147],"improvement":[148],"enabled":[149],"by":[150,154],"heterogeneous":[151],"integration,":[152],"achieved":[153],"memory":[156],"tiers.":[159]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}