{"id":"https://openalex.org/W4411726837","doi":"https://doi.org/10.1109/iscas56072.2025.11043926","title":"A PVT-Insensitive 7-Bit Coarse-Fine Ratio-Metric Digital-to-Time Converter for Fractional-N Phase-Locked Loops in 65-nm CMOS","display_name":"A PVT-Insensitive 7-Bit Coarse-Fine Ratio-Metric Digital-to-Time Converter for Fractional-N Phase-Locked Loops in 65-nm CMOS","publication_year":2025,"publication_date":"2025-05-25","ids":{"openalex":"https://openalex.org/W4411726837","doi":"https://doi.org/10.1109/iscas56072.2025.11043926"},"language":"en","primary_location":{"id":"doi:10.1109/iscas56072.2025.11043926","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas56072.2025.11043926","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5047370292","display_name":"Shenjian Zhang","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Shenjian Zhang","raw_affiliation_strings":["The Hong Kong University of Science and Technology (Guangzhou),Guangzhou,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The Hong Kong University of Science and Technology (Guangzhou),Guangzhou,China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101480352","display_name":"Chenming Zhang","orcid":"https://orcid.org/0000-0002-6770-5334"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Chenming Zhang","raw_affiliation_strings":["Sanechips Technology Co., Ltd.,Shenzhen,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Sanechips Technology Co., Ltd.,Shenzhen,China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071538550","display_name":"Hao Luo","orcid":"https://orcid.org/0000-0002-6405-4011"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Hao Luo","raw_affiliation_strings":["Sanechips Technology Co., Ltd.,Shenzhen,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Sanechips Technology Co., Ltd.,Shenzhen,China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043693602","display_name":"Shuhua Yi","orcid":"https://orcid.org/0000-0003-4932-8237"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Shengtao Yi","raw_affiliation_strings":["Sanechips Technology Co., Ltd.,Shenzhen,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Sanechips Technology Co., Ltd.,Shenzhen,China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010355600","display_name":"Xuewei Ding","orcid":"https://orcid.org/0000-0002-0211-4752"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Xuewei Ding","raw_affiliation_strings":["Sanechips Technology Co., Ltd.,Shenzhen,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Sanechips Technology Co., Ltd.,Shenzhen,China","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5035043241","display_name":"Zhirui Zong","orcid":"https://orcid.org/0000-0002-2681-0795"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Zhirui Zong","raw_affiliation_strings":["The Hong Kong University of Science and Technology (Guangzhou),Guangzhou,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The Hong Kong University of Science and Technology (Guangzhou),Guangzhou,China","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5047370292"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.12427259,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11749","display_name":"Iterative Learning Control Systems","score":0.9968000054359436,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6914552450180054},{"id":"https://openalex.org/keywords/metric","display_name":"Metric (unit)","score":0.631589412689209},{"id":"https://openalex.org/keywords/bit","display_name":"Bit (key)","score":0.5638130903244019},{"id":"https://openalex.org/keywords/phase","display_name":"Phase (matter)","score":0.4979820251464844},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.47033625841140747},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.4566234350204468},{"id":"https://openalex.org/keywords/performance-metric","display_name":"Performance metric","score":0.45563286542892456},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4427659213542938},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.3660088777542114},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.32277965545654297},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.3169654607772827},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13163191080093384}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6914552450180054},{"id":"https://openalex.org/C176217482","wikidata":"https://www.wikidata.org/wiki/Q860554","display_name":"Metric (unit)","level":2,"score":0.631589412689209},{"id":"https://openalex.org/C117011727","wikidata":"https://www.wikidata.org/wiki/Q1278488","display_name":"Bit (key)","level":2,"score":0.5638130903244019},{"id":"https://openalex.org/C44280652","wikidata":"https://www.wikidata.org/wiki/Q104837","display_name":"Phase (matter)","level":2,"score":0.4979820251464844},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.47033625841140747},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.4566234350204468},{"id":"https://openalex.org/C2780898871","wikidata":"https://www.wikidata.org/wiki/Q860554","display_name":"Performance metric","level":2,"score":0.45563286542892456},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4427659213542938},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.3660088777542114},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.32277965545654297},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.3169654607772827},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13163191080093384},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C187736073","wikidata":"https://www.wikidata.org/wiki/Q2920921","display_name":"Management","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/iscas56072.2025.11043926","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas56072.2025.11043926","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},{"id":"pmh:oai:repository.hkust.edu.hk:1783.1-158461","is_oa":false,"landing_page_url":"http://repository.hkust.edu.hk/ir/Record/1783.1-158461","pdf_url":null,"source":{"id":"https://openalex.org/S4306401796","display_name":"Rare & Special e-Zone (The Hong Kong University of Science and Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I200769079","host_organization_name":"Hong Kong University of Science and Technology","host_organization_lineage":["https://openalex.org/I200769079"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Conference paper"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.41999998688697815,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1571758417","https://openalex.org/W2036880312","https://openalex.org/W2046083587","https://openalex.org/W2097406868","https://openalex.org/W2120500930","https://openalex.org/W2142610168","https://openalex.org/W2611384543","https://openalex.org/W2801792298","https://openalex.org/W2921886179","https://openalex.org/W2972420192","https://openalex.org/W2975185022","https://openalex.org/W3099426297","https://openalex.org/W4221034770","https://openalex.org/W4248108322","https://openalex.org/W4360605781","https://openalex.org/W4385624948"],"related_works":["https://openalex.org/W1911569504","https://openalex.org/W4361804730","https://openalex.org/W2142113611","https://openalex.org/W2334467465","https://openalex.org/W2087870008","https://openalex.org/W2162534555","https://openalex.org/W2752178021","https://openalex.org/W2107419853","https://openalex.org/W2143024819","https://openalex.org/W4247159817"],"abstract_inverted_index":{"This":[0],"paper":[1],"introduces":[2],"a":[3,21,46,61,108,125],"coarse-fine":[4],"ratio-metric":[5],"digital-to-time":[6],"converter":[7],"(DTC)":[8],"for":[9],"fractional-N":[10],"phase-locked":[11],"loops":[12],"(PLLs).":[13],"The":[14,35,69,157],"proposed":[15,118,158],"DTC":[16,74,96,120,151,159],"exploits":[17],"the":[18,25,28,42,50,65,73,79,84,90,95,101,105,117,150],"period":[19],"of":[20,72,83,86,94,134],"well-defined":[22],"clock":[23,67],"from":[24,104,162],"PLL":[26],"as":[27],"time-domain":[29],"reference,":[30],"thereby":[31],"achieving":[32],"PVT-insensitive":[33],"resolution.":[34],"programmable":[36],"delay":[37,143],"is":[38,54,75,97],"achieved":[39],"by":[40,56,77,99,154],"setting":[41],"initial":[43],"charge":[44],"on":[45],"load":[47],"capacitor":[48],"in":[49,113,145],"pre-discharging":[51],"phase.":[52],"It":[53],"followed":[55],"constant-slope":[57],"discharging":[58,80,102],"to":[59],"trigger":[60],"comparator":[62],"and":[63,130,137,165],"generate":[64],"delayed":[66],"edge.":[68],"4-bit":[70],"MSBs":[71],"realized":[76],"programming":[78],"pulse":[81,110],"width":[82],"MSB":[85],"an":[87],"IDAC,":[88],"while":[89],"lower":[91],"3":[92],"bits":[93],"implemented":[98],"controlling":[100],"current":[103],"IDAC":[106],"over":[107],"fixed":[109],"width.":[111],"Designed":[112],"65-nm":[114],"CMOS":[115],"technology,":[116],"7-bit":[119],"achieves":[121],"4.72-ps":[122],"resolution":[123,152],"with":[124],"maximum":[126],"differential":[127],"nonlinearity":[128,132],"(DNL)":[129],"integral":[131],"(INL)":[133],"1.45":[135],"ps":[136,139],"2.26":[138],"at":[140],"600-ps":[141],"full-scale":[142],"range":[144],"simulations.":[146],"Over":[147],"PVT":[148],"variations,":[149],"changes":[153],"only":[155],"\u00b10.85%.":[156],"consumes":[160],"720uW":[161],"1V":[163],"supply":[164],"occupies":[166],"0.0124-mm<sup":[167],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[168],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[169],"silicon":[170],"area.":[171]},"counts_by_year":[],"updated_date":"2026-04-29T09:16:38.111599","created_date":"2025-10-10T00:00:00"}