{"id":"https://openalex.org/W4411725093","doi":"https://doi.org/10.1109/iscas56072.2025.11043785","title":"A High Bandwidth Capacitorless NMOS LDO with Pole-Tracking Scheme and Adaptive FFRC Achieving -65dB PSR across Full Load Range","display_name":"A High Bandwidth Capacitorless NMOS LDO with Pole-Tracking Scheme and Adaptive FFRC Achieving -65dB PSR across Full Load Range","publication_year":2025,"publication_date":"2025-05-25","ids":{"openalex":"https://openalex.org/W4411725093","doi":"https://doi.org/10.1109/iscas56072.2025.11043785"},"language":"en","primary_location":{"id":"doi:10.1109/iscas56072.2025.11043785","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas56072.2025.11043785","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100743369","display_name":"Jian Xu","orcid":"https://orcid.org/0000-0002-3521-6843"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":true,"raw_author_name":"Jinshuo Xu","raw_affiliation_strings":["University of Macau,State Key Laboratory of Analog and Mixed-Signal VLSI,China"],"affiliations":[{"raw_affiliation_string":"University of Macau,State Key Laboratory of Analog and Mixed-Signal VLSI,China","institution_ids":["https://openalex.org/I204512498"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101627763","display_name":"Xiaoyan Zhao","orcid":"https://orcid.org/0009-0000-1618-3428"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Xiaoyan Zhao","raw_affiliation_strings":["University of Macau,State Key Laboratory of Analog and Mixed-Signal VLSI,China"],"affiliations":[{"raw_affiliation_string":"University of Macau,State Key Laboratory of Analog and Mixed-Signal VLSI,China","institution_ids":["https://openalex.org/I204512498"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101837032","display_name":"Xiangyu Mao","orcid":"https://orcid.org/0000-0001-6530-8311"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Xiangyu Mao","raw_affiliation_strings":["University of Macau,State Key Laboratory of Analog and Mixed-Signal VLSI,China"],"affiliations":[{"raw_affiliation_string":"University of Macau,State Key Laboratory of Analog and Mixed-Signal VLSI,China","institution_ids":["https://openalex.org/I204512498"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040628447","display_name":"Jun Yin","orcid":"https://orcid.org/0000-0002-9085-3925"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Jun Yin","raw_affiliation_strings":["University of Macau,State Key Laboratory of Analog and Mixed-Signal VLSI,China"],"affiliations":[{"raw_affiliation_string":"University of Macau,State Key Laboratory of Analog and Mixed-Signal VLSI,China","institution_ids":["https://openalex.org/I204512498"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5041237834","display_name":"Mo Huang","orcid":"https://orcid.org/0000-0003-0497-194X"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Mo Huang","raw_affiliation_strings":["University of Macau,State Key Laboratory of Analog and Mixed-Signal VLSI,China"],"affiliations":[{"raw_affiliation_string":"University of Macau,State Key Laboratory of Analog and Mixed-Signal VLSI,China","institution_ids":["https://openalex.org/I204512498"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5071025160","display_name":"Yan L\u00fc","orcid":"https://orcid.org/0000-0001-9273-7576"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Yan Lu","raw_affiliation_strings":["University of Macau,State Key Laboratory of Analog and Mixed-Signal VLSI,China"],"affiliations":[{"raw_affiliation_string":"University of Macau,State Key Laboratory of Analog and Mixed-Signal VLSI,China","institution_ids":["https://openalex.org/I204512498"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5100743369"],"corresponding_institution_ids":["https://openalex.org/I204512498"],"apc_list":null,"apc_paid":null,"fwci":0.699,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.71304608,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9937999844551086,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/nmos-logic","display_name":"NMOS logic","score":0.8759753704071045},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.6498464345932007},{"id":"https://openalex.org/keywords/tracking","display_name":"Tracking (education)","score":0.4666008949279785},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4511529505252838},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.3641570508480072},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3344573974609375},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.27049362659454346},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.22798758745193481},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.15491607785224915},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.1345796287059784},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.07754340767860413},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.05979493260383606}],"concepts":[{"id":"https://openalex.org/C197162436","wikidata":"https://www.wikidata.org/wiki/Q83908","display_name":"NMOS logic","level":4,"score":0.8759753704071045},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.6498464345932007},{"id":"https://openalex.org/C2775936607","wikidata":"https://www.wikidata.org/wiki/Q466845","display_name":"Tracking (education)","level":2,"score":0.4666008949279785},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4511529505252838},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.3641570508480072},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3344573974609375},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.27049362659454346},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.22798758745193481},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.15491607785224915},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.1345796287059784},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.07754340767860413},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.05979493260383606},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.0},{"id":"https://openalex.org/C15744967","wikidata":"https://www.wikidata.org/wiki/Q9418","display_name":"Psychology","level":0,"score":0.0},{"id":"https://openalex.org/C19417346","wikidata":"https://www.wikidata.org/wiki/Q7922","display_name":"Pedagogy","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas56072.2025.11043785","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas56072.2025.11043785","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.6899999976158142}],"awards":[],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"},{"id":"https://openalex.org/F4320337495","display_name":"Technology Development","ror":null}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1995877583","https://openalex.org/W1999232020","https://openalex.org/W2015326530","https://openalex.org/W2064956733","https://openalex.org/W2090683789","https://openalex.org/W2109182259","https://openalex.org/W2753623462","https://openalex.org/W2806998864","https://openalex.org/W2807397077","https://openalex.org/W2883609246","https://openalex.org/W2947959777","https://openalex.org/W3010649687","https://openalex.org/W4221120438","https://openalex.org/W4226160124"],"related_works":["https://openalex.org/W2217098757","https://openalex.org/W3208688275","https://openalex.org/W2088771128","https://openalex.org/W1650778624","https://openalex.org/W2263373136","https://openalex.org/W2796085262","https://openalex.org/W190245591","https://openalex.org/W2082944690","https://openalex.org/W2022549222","https://openalex.org/W1486119332"],"abstract_inverted_index":{"This":[0,32],"article":[1],"presents":[2],"a":[3,35,40,50,55,83,112],"capacitorless":[4],"linear":[5],"low":[6],"dropout":[7],"regulator":[8],"(LDO)":[9],"with":[10,116],"an":[11,117],"N-type":[12],"pass":[13],"transistor":[14],"that":[15],"features":[16,88],"high":[17,47,60],"efficiency,":[18],"fast":[19,56],"transient":[20,57,115],"and":[21,39,59,107,124],"good":[22],"power":[23],"supply":[24],"rejection":[25],"(PSR)":[26],"suitable":[27],"for":[28],"system-on-chip":[29],"(SoC)":[30],"integration.":[31],"LDO":[33,53,79],"utilizes":[34],"pole-tracking":[36],"compensation":[37],"scheme":[38],"transconductance-boosted":[41],"(gm-boosted)":[42],"folded-cascode":[43],"EA":[44],"to":[45,71,111],"achieve":[46],"bandwidth.":[48],"As":[49],"result,":[51],"the":[52,73,95],"achieves":[54],"response":[58,110],"PSR":[61,74,89],"corner-frequency.":[62],"Moreover,":[63],"feedforward":[64],"ripple":[65],"cancellation":[66],"(FFRC)":[67],"is":[68,80],"also":[69],"incorporated":[70],"enhance":[72],"performance":[75,90],"further.":[76],"The":[77],"proposed":[78],"fabricated":[81],"in":[82,109],"65nm":[84],"CMOS":[85],"process.":[86],"It":[87],"better":[91],"than":[92,102],"-65dB":[93],"across":[94],"full":[96],"load":[97,114],"range":[98],"at":[99],"frequencies":[100],"lower":[101],"100kHz.":[103],"And":[104],"its":[105],"undershoot":[106],"overshoot":[108],"1mA-to-100mA":[113],"edge":[118],"time":[119],"of":[120],"100ns":[121],"are":[122],"83mV":[123],"10mV,":[125],"respectively.":[126]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}