{"id":"https://openalex.org/W4411726340","doi":"https://doi.org/10.1109/iscas56072.2025.11043507","title":"An Event-Based Digital Compute-In-Memory Accelerator with Flexible Operand Resolution and Layer-Wise Weight/Output Stationarity","display_name":"An Event-Based Digital Compute-In-Memory Accelerator with Flexible Operand Resolution and Layer-Wise Weight/Output Stationarity","publication_year":2025,"publication_date":"2025-05-25","ids":{"openalex":"https://openalex.org/W4411726340","doi":"https://doi.org/10.1109/iscas56072.2025.11043507"},"language":"en","primary_location":{"id":"doi:10.1109/iscas56072.2025.11043507","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas56072.2025.11043507","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5114634055","display_name":"Nicolas Chauvaux","orcid":null},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":true,"raw_author_name":"Nicolas Chauvaux","raw_affiliation_strings":["Delft University of Technology,Department of Microelectronics,Delft,The Netherlands"],"affiliations":[{"raw_affiliation_string":"Delft University of Technology,Department of Microelectronics,Delft,The Netherlands","institution_ids":["https://openalex.org/I98358874"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016067351","display_name":"Adrian Kneip","orcid":null},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Adrian Kneip","raw_affiliation_strings":["Delft University of Technology,Department of Microelectronics,Delft,The Netherlands"],"affiliations":[{"raw_affiliation_string":"Delft University of Technology,Department of Microelectronics,Delft,The Netherlands","institution_ids":["https://openalex.org/I98358874"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043840260","display_name":"C. Posch","orcid":"https://orcid.org/0000-0002-0373-2739"},"institutions":[{"id":"https://openalex.org/I4210139303","display_name":"Laboratoire de Recherche sur la Croissance Cellulaire, la R\u00e9paration et la R\u00e9g\u00e9n\u00e9ration Tissulaires","ror":"https://ror.org/041dsyz88","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I197681013","https://openalex.org/I4210139303"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Christoph Posch","raw_affiliation_strings":["Prophesee,Paris,France"],"affiliations":[{"raw_affiliation_string":"Prophesee,Paris,France","institution_ids":["https://openalex.org/I4210139303"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029302924","display_name":"Kofi A. A. Makinwa","orcid":"https://orcid.org/0000-0002-2992-5467"},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Kofi Makinwa","raw_affiliation_strings":["Delft University of Technology,Department of Microelectronics,Delft,The Netherlands"],"affiliations":[{"raw_affiliation_string":"Delft University of Technology,Department of Microelectronics,Delft,The Netherlands","institution_ids":["https://openalex.org/I98358874"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5053902946","display_name":"Charlotte Frenkel","orcid":"https://orcid.org/0000-0002-1879-0288"},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Charlotte Frenkel","raw_affiliation_strings":["Delft University of Technology,Department of Microelectronics,Delft,The Netherlands"],"affiliations":[{"raw_affiliation_string":"Delft University of Technology,Department of Microelectronics,Delft,The Netherlands","institution_ids":["https://openalex.org/I98358874"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5114634055"],"corresponding_institution_ids":["https://openalex.org/I98358874"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.16671475,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.9904000163078308,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/operand","display_name":"Operand","score":0.9275870323181152},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7141618132591248},{"id":"https://openalex.org/keywords/layer","display_name":"Layer (electronics)","score":0.6249866485595703},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5697710514068604},{"id":"https://openalex.org/keywords/event","display_name":"Event (particle physics)","score":0.5550805330276489},{"id":"https://openalex.org/keywords/resolution","display_name":"Resolution (logic)","score":0.47350412607192993},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3237111568450928},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2635379433631897},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.20765462517738342}],"concepts":[{"id":"https://openalex.org/C55526617","wikidata":"https://www.wikidata.org/wiki/Q719375","display_name":"Operand","level":2,"score":0.9275870323181152},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7141618132591248},{"id":"https://openalex.org/C2779227376","wikidata":"https://www.wikidata.org/wiki/Q6505497","display_name":"Layer (electronics)","level":2,"score":0.6249866485595703},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5697710514068604},{"id":"https://openalex.org/C2779662365","wikidata":"https://www.wikidata.org/wiki/Q5416694","display_name":"Event (particle physics)","level":2,"score":0.5550805330276489},{"id":"https://openalex.org/C138268822","wikidata":"https://www.wikidata.org/wiki/Q1051925","display_name":"Resolution (logic)","level":2,"score":0.47350412607192993},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3237111568450928},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2635379433631897},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.20765462517738342},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C178790620","wikidata":"https://www.wikidata.org/wiki/Q11351","display_name":"Organic chemistry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas56072.2025.11043507","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas56072.2025.11043507","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.41999998688697815,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1999085092","https://openalex.org/W2194775991","https://openalex.org/W2745933219","https://openalex.org/W2801000640","https://openalex.org/W3039515597","https://openalex.org/W3134439218","https://openalex.org/W3161867321","https://openalex.org/W4220741568","https://openalex.org/W4312081659","https://openalex.org/W4312403879","https://openalex.org/W4313048475","https://openalex.org/W4381785698","https://openalex.org/W4385080060","https://openalex.org/W4387070976","https://openalex.org/W4391092774","https://openalex.org/W4392745778"],"related_works":["https://openalex.org/W2556282987","https://openalex.org/W1533508804","https://openalex.org/W2050923821","https://openalex.org/W2506885233","https://openalex.org/W1970370079","https://openalex.org/W2333680585","https://openalex.org/W2098637578","https://openalex.org/W1999746819","https://openalex.org/W1996625680","https://openalex.org/W4378651692"],"abstract_inverted_index":{"Compute-in-memory":[0],"(CIM)":[1],"accelerators":[2],"for":[3,69],"spiking":[4],"neural":[5],"networks":[6],"(SNNs)":[7],"are":[8],"promising":[9],"solutions":[10],"to":[11,88,123,141],"enable":[12,77],"\u00b5s-level":[13],"inference":[14],"latency":[15],"and":[16,33,62,71,81,96],"ultra-low":[17],"energy":[18,120,143],"in":[19,39,111,118,144],"edge":[20],"vision":[21],"applications.":[22],"Yet,":[23],"their":[24,37],"current":[25],"lack":[26],"of":[27,43,106,153],"flexibility":[28],"at":[29,84],"both":[30],"the":[31,85,101,156],"circuit":[32],"system":[34,86],"levels":[35],"prevents":[36],"deployment":[38],"a":[40,52,65,78,107,115,149],"wide":[41],"range":[42],"real-life":[44],"scenarios.":[45],"In":[46],"this":[47],"work,":[48],"we":[49],"propose":[50],"FlexSpIM,":[51],"novel":[53],"digital":[54,126],"CIM":[55,67],"macro":[56],"that":[57],"supports":[58],"arbitrary":[59],"operand":[60,90],"resolution":[61,131],"shape":[63],"within":[64],"unified":[66],"storage":[68],"weights":[70],"membrane":[72],"potentials.":[73],"These":[74],"circuit-level":[75],"techniques":[76],"hybrid":[79],"weight-":[80],"output-stationary":[82],"dataflow":[83],"level":[87],"maximize":[89],"reuse,":[91],"thereby":[92],"minimizing":[93],"costly":[94],"on-":[95],"off-chip":[97],"data":[98],"movements":[99],"during":[100],"SNN":[102],"execution.":[103],"Measurement":[104],"results":[105],"fabricated":[108],"FlexSpIM":[109],"prototype":[110],"40-nm":[112],"CMOS":[113],"demonstrate":[114],"2\u00d7":[116],"increase":[117],"1-bit-normalized":[119],"efficiency":[121],"compared":[122],"prior":[124],"fixed-precision":[125],"CIM-based":[127],"SNNs,":[128],"while":[129,147],"providing":[130],"reconfiguration":[132],"with":[133],"bitwise":[134],"granularity.":[135],"Our":[136],"approach":[137],"can":[138],"save":[139],"up":[140],"90%":[142],"large-scale":[145],"systems,":[146],"reaching":[148],"state-of-the-art":[150],"classification":[151],"accuracy":[152],"95.8%":[154],"on":[155],"IBM":[157],"DVS":[158],"gesture":[159],"dataset.":[160]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}