{"id":"https://openalex.org/W4411724793","doi":"https://doi.org/10.1109/iscas56072.2025.11043464","title":"A 250M-2.5GHz Two-Stage Duty-Cycle Corrector with 10%-90% Correction Range and 3-Cycle Correction Latency for Mitigating Aging Effects","display_name":"A 250M-2.5GHz Two-Stage Duty-Cycle Corrector with 10%-90% Correction Range and 3-Cycle Correction Latency for Mitigating Aging Effects","publication_year":2025,"publication_date":"2025-05-25","ids":{"openalex":"https://openalex.org/W4411724793","doi":"https://doi.org/10.1109/iscas56072.2025.11043464"},"language":"en","primary_location":{"id":"doi:10.1109/iscas56072.2025.11043464","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas56072.2025.11043464","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101432886","display_name":"Zhiting Li","orcid":"https://orcid.org/0000-0003-2317-6466"},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhiting Li","raw_affiliation_strings":["Southeast University,School of Integrated Circuits,Nanjing,China,210096"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Southeast University,School of Integrated Circuits,Nanjing,China,210096","institution_ids":["https://openalex.org/I76569877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109627546","display_name":"Lishuo Deng","orcid":"https://orcid.org/0009-0009-2394-7663"},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Lishuo Deng","raw_affiliation_strings":["Southeast University,School of Integrated Circuits,Nanjing,China,210096"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Southeast University,School of Integrated Circuits,Nanjing,China,210096","institution_ids":["https://openalex.org/I76569877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5042259083","display_name":"Li Cai","orcid":"https://orcid.org/0000-0001-6737-7396"},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Cai Li","raw_affiliation_strings":["Southeast University,School of Integrated Circuits,Nanjing,China,210096"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Southeast University,School of Integrated Circuits,Nanjing,China,210096","institution_ids":["https://openalex.org/I76569877"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Changwei Yan","orcid":null},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Changwei Yan","raw_affiliation_strings":["Southeast University,School of Integrated Circuits,Nanjing,China,210096"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Southeast University,School of Integrated Circuits,Nanjing,China,210096","institution_ids":["https://openalex.org/I76569877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111284234","display_name":"Zhangrui Qian","orcid":null},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhangrui Qian","raw_affiliation_strings":["Southeast University,School of Integrated Circuits,Nanjing,China,210096"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Southeast University,School of Integrated Circuits,Nanjing,China,210096","institution_ids":["https://openalex.org/I76569877"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5057291086","display_name":"Weiwei Shan","orcid":"https://orcid.org/0000-0001-5520-1326"},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Weiwei Shan","raw_affiliation_strings":["Southeast University,School of Integrated Circuits,Nanjing,China,210096"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Southeast University,School of Integrated Circuits,Nanjing,China,210096","institution_ids":["https://openalex.org/I76569877"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I76569877"],"apc_list":null,"apc_paid":null,"fwci":1.377,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.78682043,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.7681999802589417,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.7681999802589417,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.7620000243186951,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.6866999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/duty-cycle","display_name":"Duty cycle","score":0.7236534357070923},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.6626431941986084},{"id":"https://openalex.org/keywords/range","display_name":"Range (aeronautics)","score":0.5052631497383118},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4573199152946472},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1984352469444275},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.16069361567497253},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.12391409277915955},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10461580753326416},{"id":"https://openalex.org/keywords/aerospace-engineering","display_name":"Aerospace engineering","score":0.060210198163986206}],"concepts":[{"id":"https://openalex.org/C199822604","wikidata":"https://www.wikidata.org/wiki/Q557120","display_name":"Duty cycle","level":3,"score":0.7236534357070923},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.6626431941986084},{"id":"https://openalex.org/C204323151","wikidata":"https://www.wikidata.org/wiki/Q905424","display_name":"Range (aeronautics)","level":2,"score":0.5052631497383118},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4573199152946472},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1984352469444275},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.16069361567497253},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.12391409277915955},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10461580753326416},{"id":"https://openalex.org/C146978453","wikidata":"https://www.wikidata.org/wiki/Q3798668","display_name":"Aerospace engineering","level":1,"score":0.060210198163986206}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas56072.2025.11043464","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas56072.2025.11043464","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4699999988079071,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320335787","display_name":"Fundamental Research Funds for the Central Universities","ror":null}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1999245428","https://openalex.org/W2057790510","https://openalex.org/W2110921254","https://openalex.org/W2144441564","https://openalex.org/W2794091654","https://openalex.org/W2799924654","https://openalex.org/W3089671542","https://openalex.org/W3157703948","https://openalex.org/W4310475698","https://openalex.org/W4311224391","https://openalex.org/W4366769103","https://openalex.org/W4392746363"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2899084033","https://openalex.org/W2748952813","https://openalex.org/W2390279801","https://openalex.org/W4391913857","https://openalex.org/W2358668433","https://openalex.org/W4396701345","https://openalex.org/W2376932109","https://openalex.org/W2001405890","https://openalex.org/W2900105712"],"abstract_inverted_index":{"Clock":[0],"duty-cycle":[1,25,32,36,41,54,65,114,124],"distortion":[2],"caused":[3],"by":[4,45,79],"aging":[5],"effects,":[6],"which":[7],"induces":[8],"circuit":[9],"performance":[10],"degradation,":[11],"has":[12],"become":[13],"a":[14,22,35,46,91,103,122],"significant":[15],"concern":[16],"in":[17,90],"advanced":[18],"processes.":[19],"We":[20],"propose":[21],"digital":[23],"two-stage":[24,57],"corrector":[26],"(DCC)":[27],"that":[28,99],"directly":[29],"corrects":[30],"the":[31,61,73,144],"distortion,":[33],"using":[34],"adjuster":[37],"(DCA)":[38],"for":[39,52],"coarse":[40],"width":[42],"modulation":[43],"followed":[44],"high-accuracy":[47],"half-cycle":[48],"delay":[49],"line":[50],"(HCDL)":[51],"50%":[53],"correction.":[55],"The":[56,139],"structure":[58],"further":[59],"extends":[60],"operating":[62],"frequency":[63,104],"and":[64,131],"range,":[66],"while":[67],"achieving":[68],"low":[69],"correction":[70,125,132],"latency":[71,133],"through":[72],"elimination":[74],"of":[75,106,116,127,134,143],"external":[76],"complex":[77],"control":[78],"employing":[80],"open-loop":[81],"logic":[82],"as":[83],"compared":[84],"with":[85,110],"state-of-the-art":[86],"(SOTA)":[87],"works.":[88],"Implemented":[89],"22nm":[92],"ULVT":[93],"CMOS":[94],"process,":[95],"measurement":[96],"results":[97],"show":[98],"it":[100],"operates":[101],"at":[102,129],"range":[105,115],"250M":[107],"to":[108,118],"2.5GHz":[109,130],"an":[111],"acceptable":[112],"input":[113],"10%":[117],"90%.":[119],"It":[120],"achieves":[121],"maximum":[123,140],"error":[126],"1.5%":[128],"only":[135],"three":[136],"clock":[137,146],"cycles.":[138],"peak-to-peak":[141],"jitter":[142],"output":[145],"is":[147],"13.25ps.":[148]},"counts_by_year":[{"year":2026,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
