{"id":"https://openalex.org/W4411725692","doi":"https://doi.org/10.1109/iscas56072.2025.11043433","title":"RISC-V Based Keccak Co-Processor for NIST Post-Quantum Cryptography Standards","display_name":"RISC-V Based Keccak Co-Processor for NIST Post-Quantum Cryptography Standards","publication_year":2025,"publication_date":"2025-05-25","ids":{"openalex":"https://openalex.org/W4411725692","doi":"https://doi.org/10.1109/iscas56072.2025.11043433"},"language":"en","primary_location":{"id":"doi:10.1109/iscas56072.2025.11043433","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas56072.2025.11043433","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5092357731","display_name":"Alessandra Dolmeta","orcid":"https://orcid.org/0009-0006-9480-1352"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Alessandra Dolmeta","raw_affiliation_strings":["Politecnico di Torino,Department of Electronics and Telecommunications,Torino,Italia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Torino,Department of Electronics and Telecommunications,Torino,Italia","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5116567245","display_name":"Valeria Piscopo","orcid":null},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Valeria Piscopo","raw_affiliation_strings":["Politecnico di Torino,Department of Electronics and Telecommunications,Torino,Italia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Torino,Department of Electronics and Telecommunications,Torino,Italia","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5092598637","display_name":"Mattia Mirigaldi","orcid":"https://orcid.org/0009-0004-6556-8876"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Mattia Mirigaldi","raw_affiliation_strings":["Politecnico di Torino,Department of Electronics and Telecommunications,Torino,Italia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Torino,Department of Electronics and Telecommunications,Torino,Italia","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026016005","display_name":"Maurizio Martina","orcid":"https://orcid.org/0000-0002-3069-0319"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Maurizio Martina","raw_affiliation_strings":["Politecnico di Torino,Department of Electronics and Telecommunications,Torino,Italia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Torino,Department of Electronics and Telecommunications,Torino,Italia","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5074150684","display_name":"Guido Masera","orcid":"https://orcid.org/0000-0003-2238-9443"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Guido Masera","raw_affiliation_strings":["Politecnico di Torino,Department of Electronics and Telecommunications,Torino,Italia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Torino,Department of Electronics and Telecommunications,Torino,Italia","institution_ids":["https://openalex.org/I177477856"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I177477856"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.10625175,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10682","display_name":"Quantum Computing Algorithms and Architecture","score":0.972100019454956,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10682","display_name":"Quantum Computing Algorithms and Architecture","score":0.972100019454956,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/nist","display_name":"NIST","score":0.9216967225074768},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7076677680015564},{"id":"https://openalex.org/keywords/cryptography","display_name":"Cryptography","score":0.6776065230369568},{"id":"https://openalex.org/keywords/quantum-cryptography","display_name":"Quantum cryptography","score":0.5797306299209595},{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"Reduced instruction set computing","score":0.5604540109634399},{"id":"https://openalex.org/keywords/computer-security","display_name":"Computer security","score":0.4632251262664795},{"id":"https://openalex.org/keywords/coprocessor","display_name":"Coprocessor","score":0.4484793543815613},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3930104970932007},{"id":"https://openalex.org/keywords/quantum","display_name":"Quantum","score":0.30595993995666504},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2880593538284302},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.1959201991558075},{"id":"https://openalex.org/keywords/quantum-information","display_name":"Quantum information","score":0.10356992483139038},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.07997661828994751}],"concepts":[{"id":"https://openalex.org/C111219384","wikidata":"https://www.wikidata.org/wiki/Q6954384","display_name":"NIST","level":2,"score":0.9216967225074768},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7076677680015564},{"id":"https://openalex.org/C178489894","wikidata":"https://www.wikidata.org/wiki/Q8789","display_name":"Cryptography","level":2,"score":0.6776065230369568},{"id":"https://openalex.org/C144901912","wikidata":"https://www.wikidata.org/wiki/Q471906","display_name":"Quantum cryptography","level":4,"score":0.5797306299209595},{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.5604540109634399},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.4632251262664795},{"id":"https://openalex.org/C86111242","wikidata":"https://www.wikidata.org/wiki/Q859595","display_name":"Coprocessor","level":2,"score":0.4484793543815613},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3930104970932007},{"id":"https://openalex.org/C84114770","wikidata":"https://www.wikidata.org/wiki/Q46344","display_name":"Quantum","level":2,"score":0.30595993995666504},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2880593538284302},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.1959201991558075},{"id":"https://openalex.org/C169699857","wikidata":"https://www.wikidata.org/wiki/Q2122243","display_name":"Quantum information","level":3,"score":0.10356992483139038},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.07997661828994751},{"id":"https://openalex.org/C204321447","wikidata":"https://www.wikidata.org/wiki/Q30642","display_name":"Natural language processing","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas56072.2025.11043433","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas56072.2025.11043433","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1675170120","https://openalex.org/W2010369341","https://openalex.org/W2587223443","https://openalex.org/W2898671151","https://openalex.org/W2987483625","https://openalex.org/W3016085798","https://openalex.org/W3021991761","https://openalex.org/W3091131309","https://openalex.org/W4313645570","https://openalex.org/W4385585423","https://openalex.org/W4389056114","https://openalex.org/W4392754361","https://openalex.org/W6860730580"],"related_works":["https://openalex.org/W4318899699","https://openalex.org/W2354889781","https://openalex.org/W2132643331","https://openalex.org/W2160342394","https://openalex.org/W4256272048","https://openalex.org/W42608004","https://openalex.org/W4383066258","https://openalex.org/W1483078277","https://openalex.org/W4320058182","https://openalex.org/W2377395201"],"abstract_inverted_index":{"This":[0,40],"paper":[1],"presents":[2],"the":[3,19,24,27,50,55,82,87,128,131],"design":[4],"and":[5,60,67,115],"implementation":[6,98],"of":[7,58,90,130],"a":[8,102,108],"RISC-V-based":[9],"Keccak":[10,83],"co-processor":[11,25,84],"optimized":[12],"for":[13,37,136],"Post-Quantum":[14],"Cryptography":[15],"(PQC)":[16],"algorithms.":[17,96],"Leveraging":[18],"Core-V":[20],"eXtension":[21],"InterFace":[22],"(CV-X-IF),":[23],"extends":[26],"Instruction":[28],"Set":[29],"Architecture":[30],"(ISA)":[31],"with":[32],"three":[33],"custom":[34],"instructions":[35],"tailored":[36],"cryptographic":[38,137],"operations.":[39],"allows":[41],"seamless":[42],"integration":[43],"into":[44],"various":[45],"PQC":[46],"schemes,":[47],"tested":[48],"across":[49],"multiple":[51],"standards":[52],"proposed":[53],"by":[54],"National":[56],"Institute":[57],"Standards":[59],"Technology":[61],"(NIST),":[62],"including":[63],"CRYSTALS-Kyber,":[64],"CRYSTALS-Dilithium,":[65],"SPHINCS+,":[66],"FALCON,":[68],"which":[69],"are":[70],"designed":[71],"to":[72,94,113],"withstand":[73],"quantum":[74],"attacks.":[75],"By":[76],"employing":[77],"tightly":[78],"coupled":[79],"hardware":[80],"acceleration,":[81],"dramatically":[85],"reduces":[86],"computational":[88],"overhead":[89],"hash-based":[91],"operations":[92],"central":[93],"these":[95],"The":[97,119],"is":[99],"realized":[100],"on":[101],"Xilinx":[103],"Artix":[104],"7":[105],"FPGA,":[106],"achieving":[107],"clock":[109],"cycles\u2019":[110],"improvement":[111],"up":[112],"75%":[114],"19%":[116],"resource":[117],"overhead.":[118],"results":[120],"presented":[121],"herein":[122],"demonstrate":[123],"significant":[124],"performance":[125],"enhancement":[126],"over":[127],"state":[129],"art,":[132],"underscoring":[133],"its":[134],"effectiveness":[135],"applications.":[138]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
