{"id":"https://openalex.org/W4411725184","doi":"https://doi.org/10.1109/iscas56072.2025.11043424","title":"Interlaced 6T-10T CMOS in-memory computing circuit for low silicon area pipelined DNNs","display_name":"Interlaced 6T-10T CMOS in-memory computing circuit for low silicon area pipelined DNNs","publication_year":2025,"publication_date":"2025-05-25","ids":{"openalex":"https://openalex.org/W4411725184","doi":"https://doi.org/10.1109/iscas56072.2025.11043424"},"language":"en","primary_location":{"id":"doi:10.1109/iscas56072.2025.11043424","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas56072.2025.11043424","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5072325815","display_name":"Gin\u00e9s Dom\u00e9nech\u2010Asensi","orcid":"https://orcid.org/0000-0002-2419-9275"},"institutions":[{"id":"https://openalex.org/I3123212020","display_name":"Universidad Polit\u00e9cnica de Cartagena","ror":"https://ror.org/02k5kx966","country_code":"ES","type":"education","lineage":["https://openalex.org/I3123212020"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Gines Domenech-Asensi","raw_affiliation_strings":["Universidad Polit&#x00E9;cnica de Cartagena,Dpto. de Electr&#x00F3;nica, Tec. de Computadoras y Proyectos,Cartagena,Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Universidad Polit&#x00E9;cnica de Cartagena,Dpto. de Electr&#x00F3;nica, Tec. de Computadoras y Proyectos,Cartagena,Spain","institution_ids":["https://openalex.org/I3123212020"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5116057713","display_name":"Francisco Javier Andreo-Oliver","orcid":null},"institutions":[{"id":"https://openalex.org/I3123212020","display_name":"Universidad Polit\u00e9cnica de Cartagena","ror":"https://ror.org/02k5kx966","country_code":"ES","type":"education","lineage":["https://openalex.org/I3123212020"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Francisco Javier Andreo-Oliver","raw_affiliation_strings":["Universidad Polit&#x00E9;cnica de Cartagena,Dpto. de Electr&#x00F3;nica, Tec. de Computadoras y Proyectos,Cartagena,Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Universidad Polit&#x00E9;cnica de Cartagena,Dpto. de Electr&#x00F3;nica, Tec. de Computadoras y Proyectos,Cartagena,Spain","institution_ids":["https://openalex.org/I3123212020"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063226771","display_name":"R. Ru\u0131\u0301z","orcid":"https://orcid.org/0000-0002-3890-8124"},"institutions":[{"id":"https://openalex.org/I3123212020","display_name":"Universidad Polit\u00e9cnica de Cartagena","ror":"https://ror.org/02k5kx966","country_code":"ES","type":"education","lineage":["https://openalex.org/I3123212020"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Ramon Ruiz-Merino","raw_affiliation_strings":["Universidad Polit&#x00E9;cnica de Cartagena,Dpto. de Electr&#x00F3;nica, Tec. de Computadoras y Proyectos,Cartagena,Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Universidad Polit&#x00E9;cnica de Cartagena,Dpto. de Electr&#x00F3;nica, Tec. de Computadoras y Proyectos,Cartagena,Spain","institution_ids":["https://openalex.org/I3123212020"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5013362780","display_name":"Jos\u00e9 \u00c1ngel D\u00edaz\u2010Madrid","orcid":null},"institutions":[{"id":"https://openalex.org/I4210100615","display_name":"Centro Universitario de la Defensa en San Javier","ror":"https://ror.org/00nqz4988","country_code":"ES","type":"education","lineage":["https://openalex.org/I4210100615"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Jose Angel Diaz-Madrid","raw_affiliation_strings":["Centro Universitario de la Defensa-UPCT,Dpto. de Ingenier&#x00ED;a y T&#x00E9;cnicas Aplicadas,Cartagena,Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Centro Universitario de la Defensa-UPCT,Dpto. de Ingenier&#x00ED;a y T&#x00E9;cnicas Aplicadas,Cartagena,Spain","institution_ids":["https://openalex.org/I4210100615"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.1483486,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9934999942779541,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9907000064849854,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7834616899490356},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7168155908584595},{"id":"https://openalex.org/keywords/silicon","display_name":"Silicon","score":0.5143159627914429},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.46901506185531616},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3530447483062744},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3475576639175415},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.24693390727043152},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.14424744248390198},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10960522294044495},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.0959324836730957}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7834616899490356},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7168155908584595},{"id":"https://openalex.org/C544956773","wikidata":"https://www.wikidata.org/wiki/Q670","display_name":"Silicon","level":2,"score":0.5143159627914429},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.46901506185531616},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3530447483062744},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3475576639175415},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.24693390727043152},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.14424744248390198},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10960522294044495},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.0959324836730957}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas56072.2025.11043424","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas56072.2025.11043424","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6299999952316284,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W2618530766","https://openalex.org/W2740455604","https://openalex.org/W2899641901","https://openalex.org/W2920326572","https://openalex.org/W2969812992","https://openalex.org/W2976137532","https://openalex.org/W2981124343","https://openalex.org/W2990591126","https://openalex.org/W3026786299","https://openalex.org/W4205498988","https://openalex.org/W4312951380","https://openalex.org/W4322153971","https://openalex.org/W6692521979"],"related_works":["https://openalex.org/W3014521742","https://openalex.org/W2617868873","https://openalex.org/W3204141294","https://openalex.org/W4386230336","https://openalex.org/W4306968100","https://openalex.org/W2464627195","https://openalex.org/W2171986175","https://openalex.org/W2089791793","https://openalex.org/W2038858740","https://openalex.org/W1491218245"],"abstract_inverted_index":{"This":[0,73],"paper":[1],"presents":[2],"an":[3,26,175],"in-memory":[4,70,135],"computing":[5,71],"architecture":[6,40],"of":[7,32,46,52,60,63,112,165,171,178],"a":[8,30,43,47,58,77,124,133,143,163,169],"convolutional":[9],"layer":[10,45],"useful":[11],"to":[12,19,42,76,115,127,132,157],"build":[13],"binary":[14,54],"deep":[15],"neural":[16],"networks":[17],"aimed":[18],"work":[20],"on":[21,142],"pixel":[22],"streams":[23],"coming":[24],"from":[25],"image":[27,34,120,129,160],"sensor":[28],"at":[29,162,168],"rate":[31,164],"one":[33],"row":[35],"per":[36],"clock":[37],"cycle.":[38],"The":[39,104,137],"corresponds":[41],"hidden":[44],"network":[48],"and":[49,99,117],"is":[50,155],"capable":[51],"performing":[53],"convolutions":[55],"by":[56,123],"combining":[57],"set":[59],"interlaced":[61],"columns":[62,91],"conventional":[64,134],"6T":[65,89],"SRAM":[66,90],"cells":[67,95],"with":[68],"10T":[69,94],"cells.":[72],"arrangement":[74],"leads":[75],"weight\u2013stationary":[78],"architecture,":[79],"where":[80],"input":[81],"activation":[82],"values":[83],"are":[84,121],"sequentially":[85],"stored":[86],"in":[87],"the":[88,93,97,101,110,119,128,153],"while":[92],"store":[96,116],"weights":[98],"perform":[100,158],"convolution":[102],"operation.":[103],"proposed":[105],"pipelined":[106],"operation,":[107],"allows":[108],"that":[109,152],"requirements":[111],"silicon":[113],"area":[114],"process":[118,159],"reduced":[122],"factor":[125],"equal":[126],"height":[130],"compared":[131],"architecture.":[136],"circuit":[138,154],"has":[139],"been":[140],"synthesized":[141],"180":[144],"nm":[145],"standard":[146],"CMOS":[147],"technology.":[148],"Simulation":[149],"results":[150],"show":[151],"able":[156],"inferences":[161],"5M":[166],"S/s,":[167],"expense":[170],"194,1":[172],"fJ/operation,":[173],"achieving":[174],"overall":[176],"efficiency":[177],"5.15":[179],"TOPS/W.":[180]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
