{"id":"https://openalex.org/W4411726357","doi":"https://doi.org/10.1109/iscas56072.2025.11043262","title":"A 40nm STT-MRAM Near-Memory Computing Macro for Memory-Augmented Neural Network Acceleration","display_name":"A 40nm STT-MRAM Near-Memory Computing Macro for Memory-Augmented Neural Network Acceleration","publication_year":2025,"publication_date":"2025-05-25","ids":{"openalex":"https://openalex.org/W4411726357","doi":"https://doi.org/10.1109/iscas56072.2025.11043262"},"language":"en","primary_location":{"id":"doi:10.1109/iscas56072.2025.11043262","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas56072.2025.11043262","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5113886535","display_name":"Hongrui Meng","orcid":null},"institutions":[{"id":"https://openalex.org/I4391767673","display_name":"State Key Laboratory of ASIC and System","ror":"https://ror.org/01mamgv83","country_code":null,"type":"facility","lineage":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]},{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Hongrui Meng","raw_affiliation_strings":["Fudan University,State Key Laboratory of ASIC and System, School of Microelectronics,Shanghai,China,200433"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Laboratory of ASIC and System, School of Microelectronics,Shanghai,China,200433","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067","https://openalex.org/I4391767673"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5115590757","display_name":"Yajun Wu","orcid":null},"institutions":[{"id":"https://openalex.org/I4391767673","display_name":"State Key Laboratory of ASIC and System","ror":"https://ror.org/01mamgv83","country_code":null,"type":"facility","lineage":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]},{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yajun Wu","raw_affiliation_strings":["Fudan University,State Key Laboratory of ASIC and System, School of Microelectronics,Shanghai,China,200433"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Laboratory of ASIC and System, School of Microelectronics,Shanghai,China,200433","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067","https://openalex.org/I4391767673"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054540364","display_name":"Shengchao Zhou","orcid":"https://orcid.org/0000-0001-7761-6346"},"institutions":[{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]},{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4391767673","display_name":"State Key Laboratory of ASIC and System","ror":"https://ror.org/01mamgv83","country_code":null,"type":"facility","lineage":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shengchao Zhou","raw_affiliation_strings":["Fudan University,State Key Laboratory of ASIC and System, School of Microelectronics,Shanghai,China,200433"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Laboratory of ASIC and System, School of Microelectronics,Shanghai,China,200433","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067","https://openalex.org/I4391767673"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002653614","display_name":"Zizhao Ma","orcid":"https://orcid.org/0000-0002-2903-2108"},"institutions":[{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]},{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4391767673","display_name":"State Key Laboratory of ASIC and System","ror":"https://ror.org/01mamgv83","country_code":null,"type":"facility","lineage":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zizhao Ma","raw_affiliation_strings":["Fudan University,State Key Laboratory of ASIC and System, School of Microelectronics,Shanghai,China,200433"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Laboratory of ASIC and System, School of Microelectronics,Shanghai,China,200433","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067","https://openalex.org/I4391767673"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5087374358","display_name":"Tai Min","orcid":"https://orcid.org/0000-0003-4682-4091"},"institutions":[{"id":"https://openalex.org/I87445476","display_name":"Xi'an Jiaotong University","ror":"https://ror.org/017zhmm22","country_code":"CN","type":"education","lineage":["https://openalex.org/I87445476"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Tai Min","raw_affiliation_strings":["Xi&#x2019;An Jiaotong University,Xi&#x2019;An,China,710049"],"affiliations":[{"raw_affiliation_string":"Xi&#x2019;An Jiaotong University,Xi&#x2019;An,China,710049","institution_ids":["https://openalex.org/I87445476"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053547399","display_name":"Shao Hao Wang","orcid":"https://orcid.org/0000-0003-0710-0613"},"institutions":[{"id":"https://openalex.org/I80947539","display_name":"Fuzhou University","ror":"https://ror.org/011xvna82","country_code":"CN","type":"education","lineage":["https://openalex.org/I80947539"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shaohao Wang","raw_affiliation_strings":["Fuzhou University,Fuzhou,China,350108"],"affiliations":[{"raw_affiliation_string":"Fuzhou University,Fuzhou,China,350108","institution_ids":["https://openalex.org/I80947539"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103242777","display_name":"Yufeng Xie","orcid":"https://orcid.org/0000-0002-6541-2925"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4391767673","display_name":"State Key Laboratory of ASIC and System","ror":"https://ror.org/01mamgv83","country_code":null,"type":"facility","lineage":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yufeng Xie","raw_affiliation_strings":["Fudan University,State Key Laboratory of ASIC and System, School of Microelectronics,Shanghai,China,200433"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Laboratory of ASIC and System, School of Microelectronics,Shanghai,China,200433","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067","https://openalex.org/I4391767673"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5113886535"],"corresponding_institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4210132426","https://openalex.org/I4391767673"],"apc_list":null,"apc_paid":null,"fwci":0.7467,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.74198277,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9961000084877014,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9961000084877014,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10320","display_name":"Neural Networks and Applications","score":0.9911999702453613,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9861000180244446,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/magnetoresistive-random-access-memory","display_name":"Magnetoresistive random-access memory","score":0.7615041732788086},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7305753231048584},{"id":"https://openalex.org/keywords/acceleration","display_name":"Acceleration","score":0.647304117679596},{"id":"https://openalex.org/keywords/macro","display_name":"Macro","score":0.5688233375549316},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.5647040605545044},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.40218299627304077},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3990311026573181},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.36094892024993896},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.19659024477005005},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.1849866807460785}],"concepts":[{"id":"https://openalex.org/C46891859","wikidata":"https://www.wikidata.org/wiki/Q1061546","display_name":"Magnetoresistive random-access memory","level":3,"score":0.7615041732788086},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7305753231048584},{"id":"https://openalex.org/C117896860","wikidata":"https://www.wikidata.org/wiki/Q11376","display_name":"Acceleration","level":2,"score":0.647304117679596},{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.5688233375549316},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.5647040605545044},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.40218299627304077},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3990311026573181},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.36094892024993896},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.19659024477005005},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.1849866807460785},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C74650414","wikidata":"https://www.wikidata.org/wiki/Q11397","display_name":"Classical mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas56072.2025.11043262","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas56072.2025.11043262","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.800000011920929,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1963704246","https://openalex.org/W2116557123","https://openalex.org/W2793776854","https://openalex.org/W3016147292","https://openalex.org/W3034942609","https://openalex.org/W3138228727","https://openalex.org/W4205870316","https://openalex.org/W4286571889","https://openalex.org/W4307044055","https://openalex.org/W4308089783","https://openalex.org/W4312855541","https://openalex.org/W6712906272","https://openalex.org/W6800405542"],"related_works":["https://openalex.org/W4403122749","https://openalex.org/W2002108625","https://openalex.org/W2375427054","https://openalex.org/W4231914254","https://openalex.org/W2163958441","https://openalex.org/W2074510558","https://openalex.org/W2076707939","https://openalex.org/W1576547964","https://openalex.org/W1998340208","https://openalex.org/W4206753316"],"abstract_inverted_index":{"Memory-augmented":[0],"neural":[1],"network":[2],"(MANN)":[3],"has":[4],"gained":[5],"attention":[6],"as":[7],"a":[8],"pivotal":[9],"solution":[10],"for":[11,18,32,55,69,118],"few-shot":[12],"learning":[13],"(FSL).":[14],"Among":[15],"the":[16,111,125],"candidates":[17],"associative":[19],"memory":[20,28],"in":[21,97],"MANN":[22,56],"accelerators,":[23],"spin-transfer":[24],"torque":[25],"magnetic":[26],"random-access":[27],"(STT-MRAM)":[29],"stands":[30],"out":[31],"its":[33],"compact":[34],"cell":[35],"area,":[36],"long":[37],"data":[38],"retention":[39],"time,":[40],"and":[41,116,121],"excellent":[42],"scalability.":[43],"In":[44],"this":[45],"paper,":[46],"we":[47],"propose":[48],"an":[49,104],"STT-MRAM":[50],"near-memory":[51],"computing":[52,67],"(NMC)":[53],"macro":[54,59,102],"acceleration.":[57],"The":[58],"contains":[60],"following":[61],"innovations:":[62],"1)":[63],"An":[64],"array-level":[65],"parallel":[66],"architecture":[68],"L1":[70],"distance":[71],"calculation.":[72],"2)":[73],"A":[74,85],"low-area-overhead":[75],"memory-invert":[76],"coding":[77],"technique":[78],"to":[79,92],"reduce":[80],"write":[81],"energy":[82,105],"consumption.":[83],"3)":[84],"configurable":[86],"dynamic":[87],"offset-compensation":[88],"sense":[89],"amplifier":[90],"(CDOC-SA)":[91],"improve":[93],"classification":[94,112],"accuracy.":[95],"Fabricated":[96],"40nm":[98],"CMOS":[99],"process,":[100],"our":[101],"demonstrates":[103],"efficiency":[106],"of":[107,114],"6.47":[108],"TOPS/W,":[109],"achieving":[110],"accuracy":[113],"98.3%":[115],"93%":[117],"8-way-5-shot":[119],"tasks":[120,123],"16-way-5-shot":[122],"on":[124],"Omniglot":[126],"dataset.":[127]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
