{"id":"https://openalex.org/W4411726324","doi":"https://doi.org/10.1109/iscas56072.2025.11043236","title":"Memristor-Assisted CDAC Background Calibration Scheme for SAR ADCs","display_name":"Memristor-Assisted CDAC Background Calibration Scheme for SAR ADCs","publication_year":2025,"publication_date":"2025-05-25","ids":{"openalex":"https://openalex.org/W4411726324","doi":"https://doi.org/10.1109/iscas56072.2025.11043236"},"language":"en","primary_location":{"id":"doi:10.1109/iscas56072.2025.11043236","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas56072.2025.11043236","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5013912964","display_name":"Zhaoguang Si","orcid":"https://orcid.org/0000-0003-2966-6183"},"institutions":[{"id":"https://openalex.org/I47508984","display_name":"Imperial College London","ror":"https://ror.org/041kmwe10","country_code":"GB","type":"education","lineage":["https://openalex.org/I47508984"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Zhaoguang Si","raw_affiliation_strings":["Imperial College London,Department of Electrical and Electronic Engineering,UK,SW7 2BT"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Imperial College London,Department of Electrical and Electronic Engineering,UK,SW7 2BT","institution_ids":["https://openalex.org/I47508984"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047231274","display_name":"Chaohan Wang","orcid":"https://orcid.org/0000-0003-1579-7262"},"institutions":[{"id":"https://openalex.org/I4210147027","display_name":"Integrated Medicines (United Kingdom)","ror":"https://ror.org/0485zq002","country_code":"GB","type":"company","lineage":["https://openalex.org/I4210147027"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Chaohan Wang","raw_affiliation_strings":["imec,Cambridge,UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"imec,Cambridge,UK","institution_ids":["https://openalex.org/I4210147027"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091609464","display_name":"Xiongfei Jiang","orcid":"https://orcid.org/0000-0002-8736-2914"},"institutions":[{"id":"https://openalex.org/I4210087927","display_name":"National Microelectronics Institute","ror":"https://ror.org/003ck6433","country_code":"GB","type":"nonprofit","lineage":["https://openalex.org/I4210087927"]},{"id":"https://openalex.org/I98677209","display_name":"University of Edinburgh","ror":"https://ror.org/01nrxwf90","country_code":"GB","type":"education","lineage":["https://openalex.org/I98677209"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Xiongfei Jiang","raw_affiliation_strings":["University of Edinburgh,Institute for Integrated Micro and Nano Systems, School of Engineering,UK,EH9 3JL"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Edinburgh,Institute for Integrated Micro and Nano Systems, School of Engineering,UK,EH9 3JL","institution_ids":["https://openalex.org/I4210087927","https://openalex.org/I98677209"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100374826","display_name":"Yu\u2010Fei Wang","orcid":"https://orcid.org/0000-0002-4530-2630"},"institutions":[{"id":"https://openalex.org/I47508984","display_name":"Imperial College London","ror":"https://ror.org/041kmwe10","country_code":"GB","type":"education","lineage":["https://openalex.org/I47508984"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Yufei Wang","raw_affiliation_strings":["Imperial College London,Department of Electrical and Electronic Engineering,UK,SW7 2BT"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Imperial College London,Department of Electrical and Electronic Engineering,UK,SW7 2BT","institution_ids":["https://openalex.org/I47508984"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Themis Prodromakis","orcid":null},"institutions":[{"id":"https://openalex.org/I4210087927","display_name":"National Microelectronics Institute","ror":"https://ror.org/003ck6433","country_code":"GB","type":"nonprofit","lineage":["https://openalex.org/I4210087927"]},{"id":"https://openalex.org/I98677209","display_name":"University of Edinburgh","ror":"https://ror.org/01nrxwf90","country_code":"GB","type":"education","lineage":["https://openalex.org/I98677209"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Themis Prodromakis","raw_affiliation_strings":["University of Edinburgh,Institute for Integrated Micro and Nano Systems, School of Engineering,UK,EH9 3JL"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Edinburgh,Institute for Integrated Micro and Nano Systems, School of Engineering,UK,EH9 3JL","institution_ids":["https://openalex.org/I4210087927","https://openalex.org/I98677209"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100340285","display_name":"Shiwei Wang","orcid":"https://orcid.org/0000-0002-5450-2108"},"institutions":[{"id":"https://openalex.org/I4210087927","display_name":"National Microelectronics Institute","ror":"https://ror.org/003ck6433","country_code":"GB","type":"nonprofit","lineage":["https://openalex.org/I4210087927"]},{"id":"https://openalex.org/I98677209","display_name":"University of Edinburgh","ror":"https://ror.org/01nrxwf90","country_code":"GB","type":"education","lineage":["https://openalex.org/I98677209"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Shiwei Wang","raw_affiliation_strings":["University of Edinburgh,Institute for Integrated Micro and Nano Systems, School of Engineering,UK,EH9 3JL"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Edinburgh,Institute for Integrated Micro and Nano Systems, School of Engineering,UK,EH9 3JL","institution_ids":["https://openalex.org/I4210087927","https://openalex.org/I98677209"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5048618563","display_name":"Christos Papavassiliou","orcid":"https://orcid.org/0000-0002-8003-2146"},"institutions":[{"id":"https://openalex.org/I47508984","display_name":"Imperial College London","ror":"https://ror.org/041kmwe10","country_code":"GB","type":"education","lineage":["https://openalex.org/I47508984"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Christos Papavassiliou","raw_affiliation_strings":["Imperial College London,Department of Electrical and Electronic Engineering,UK,SW7 2BT"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Imperial College London,Department of Electrical and Electronic Engineering,UK,SW7 2BT","institution_ids":["https://openalex.org/I47508984"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9897000193595886,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9884999990463257,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/calibration","display_name":"Calibration","score":0.6702293753623962},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.5438478589057922},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5340394377708435},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.33741843700408936},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.16902431845664978},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12760940194129944},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.10738381743431091}],"concepts":[{"id":"https://openalex.org/C165838908","wikidata":"https://www.wikidata.org/wiki/Q736777","display_name":"Calibration","level":2,"score":0.6702293753623962},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.5438478589057922},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5340394377708435},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.33741843700408936},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.16902431845664978},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12760940194129944},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.10738381743431091},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas56072.2025.11043236","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas56072.2025.11043236","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W2101004723","https://openalex.org/W2124838096","https://openalex.org/W2323986115","https://openalex.org/W2535745143","https://openalex.org/W2731422849","https://openalex.org/W2778935320","https://openalex.org/W2782303535","https://openalex.org/W2901134537","https://openalex.org/W3209971340","https://openalex.org/W4377000466","https://openalex.org/W4385079975"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2899084033","https://openalex.org/W2748952813","https://openalex.org/W2390279801","https://openalex.org/W4391913857","https://openalex.org/W2358668433","https://openalex.org/W4396701345","https://openalex.org/W2376932109","https://openalex.org/W2001405890","https://openalex.org/W4396696052"],"abstract_inverted_index":{"This":[0,62],"paper":[1],"proposes":[2],"a":[3,22,30,39,51,68,83,178],"V<inf":[4,31,111],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[5,32,98,112,168],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">ref</inf>-compensated":[6],"memristor-assisted":[7,158],"CDAC":[8,18,116],"background":[9],"calibration":[10],"scheme":[11,35],"for":[12,181],"Nyquist":[13],"SAR":[14,27,136,163],"ADCs.":[15],"The":[16,161],"proposed":[17,162],"is":[19,64,87],"implemented":[20],"in":[21,134,139],"12-bit":[23],"5":[24],"MS/s":[25],"asynchronous":[26],"ADC":[28,94,164],"featuring":[29],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">cm</inf>-based":[33],"switching":[34],"and":[36],"designed":[37],"using":[38,71],"standard":[40],"65":[41],"nm":[42],"CMOS":[43],"process.":[44],"Capacitor":[45],"mismatches":[46],"are":[47],"detected":[48],"by":[49,123,143],"introducing":[50],"redundant":[52],"bit,":[53],"which":[54],"evaluates":[55],"the":[56,59,93,102,105,109,115,129,147,173],"sign":[57,103],"of":[58,104,131],"mismatch":[60,106],"error.":[61,107],"error":[63],"then":[65],"calibrated":[66],"through":[67],"feedback":[69],"loop":[70],"voltage":[72,80,85,96],"dividers":[73,81],"with":[74,157],"four":[75],"integrated":[76],"memristors.":[77],"These":[78],"programmable":[79],"generate":[82],"compensating":[84],"that":[86],"added":[88],"to":[89,119,154,172],"or":[90],"subtracted":[91],"from":[92,151],"reference":[95],"(V<inf":[97],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">ref</inf>)":[99],"based":[100],"on":[101],"Consequently,":[108],"adjusted":[110],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">ref</inf>":[113],"compensates":[114],"output":[117],"level":[118],"reduce":[120],"non-linearity":[121,133],"induced":[122],"capacitor":[124,144],"mismatches.":[125],"Simulation":[126],"results":[127],"validate":[128],"feasibility":[130],"optimizing":[132],"moderate/high-resolution":[135],"ADCs":[137],"(12-bit":[138],"this":[140],"study)":[141],"caused":[142],"mismatches,":[145],"improving":[146],"signal-to-noise-and-distortion":[148],"ratio":[149],"(SNDR)":[150],"41.85":[152],"dB":[153,156],"65.98":[155],"analog":[159],"circuits.":[160],"occupies":[165],"0.0153":[166],"mm<sup":[167],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[169],"area":[170],"according":[171],"layout":[174],"floorplan,":[175],"making":[176],"it":[177],"promising":[179],"candidate":[180],"miniature/large-scale":[182],"sensor":[183],"interface":[184],"application.":[185]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}