{"id":"https://openalex.org/W3158736284","doi":"https://doi.org/10.1109/iscas51556.2021.9401786","title":"Causal Information Prediction for Analog Circuit Design Using Variable Selection Methods Based on Machine Learning","display_name":"Causal Information Prediction for Analog Circuit Design Using Variable Selection Methods Based on Machine Learning","publication_year":2021,"publication_date":"2021-04-27","ids":{"openalex":"https://openalex.org/W3158736284","doi":"https://doi.org/10.1109/iscas51556.2021.9401786","mag":"3158736284"},"language":"en","primary_location":{"id":"doi:10.1109/iscas51556.2021.9401786","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas51556.2021.9401786","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5088038023","display_name":"Ahmed Abuelnasr","orcid":"https://orcid.org/0000-0002-2153-4496"},"institutions":[{"id":"https://openalex.org/I45683168","display_name":"Polytechnique Montr\u00e9al","ror":"https://ror.org/05f8d4e86","country_code":"CA","type":"education","lineage":["https://openalex.org/I45683168"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Ahmed Abuelnasr","raw_affiliation_strings":["Department of Electrical Engineering, Polytechniaue Montr\u00e9al, QC, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Polytechniaue Montr\u00e9al, QC, Canada","institution_ids":["https://openalex.org/I45683168"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5024661151","display_name":"Mostafa Amer","orcid":"https://orcid.org/0000-0002-3246-8156"},"institutions":[{"id":"https://openalex.org/I45683168","display_name":"Polytechnique Montr\u00e9al","ror":"https://ror.org/05f8d4e86","country_code":"CA","type":"education","lineage":["https://openalex.org/I45683168"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Mostafa Amer","raw_affiliation_strings":["Department of Electrical Engineering, Polytechniaue Montr\u00e9al, QC, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Polytechniaue Montr\u00e9al, QC, Canada","institution_ids":["https://openalex.org/I45683168"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5015695822","display_name":"Ahmed Ragab","orcid":"https://orcid.org/0000-0002-0075-203X"},"institutions":[{"id":"https://openalex.org/I1281735042","display_name":"Natural Resources Canada","ror":"https://ror.org/05hepy730","country_code":"CA","type":"government","lineage":["https://openalex.org/I1281735042","https://openalex.org/I2802286613"]},{"id":"https://openalex.org/I63601056","display_name":"Menoufia University","ror":"https://ror.org/05sjrb944","country_code":"EG","type":"education","lineage":["https://openalex.org/I63601056"]}],"countries":["CA","EG"],"is_corresponding":false,"raw_author_name":"Ahmed Ragab","raw_affiliation_strings":["Faculty of Electronic Engineering, Menoufia University, Menouf, Egypt","Natural Resources Canada, QC, Canada"],"affiliations":[{"raw_affiliation_string":"Faculty of Electronic Engineering, Menoufia University, Menouf, Egypt","institution_ids":["https://openalex.org/I63601056"]},{"raw_affiliation_string":"Natural Resources Canada, QC, Canada","institution_ids":["https://openalex.org/I1281735042"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018071134","display_name":"Benoit Gosselin","orcid":"https://orcid.org/0000-0003-1473-3451"},"institutions":[{"id":"https://openalex.org/I43406934","display_name":"Universit\u00e9 Laval","ror":"https://ror.org/04sjchr03","country_code":"CA","type":"education","lineage":["https://openalex.org/I43406934"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Benoit Gosselin","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Laval University, QC, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Laval University, QC, Canada","institution_ids":["https://openalex.org/I43406934"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5038488044","display_name":"Yvon Savaria","orcid":"https://orcid.org/0000-0002-3404-9959"},"institutions":[{"id":"https://openalex.org/I45683168","display_name":"Polytechnique Montr\u00e9al","ror":"https://ror.org/05f8d4e86","country_code":"CA","type":"education","lineage":["https://openalex.org/I45683168"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Yvon Savaria","raw_affiliation_strings":["Department of Electrical Engineering, Polytechniaue Montr\u00e9al, QC, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Polytechniaue Montr\u00e9al, QC, Canada","institution_ids":["https://openalex.org/I45683168"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5088038023"],"corresponding_institution_ids":["https://openalex.org/I45683168"],"apc_list":null,"apc_paid":null,"fwci":0.6072,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.66400744,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7003421187400818},{"id":"https://openalex.org/keywords/graph","display_name":"Graph","score":0.6029404401779175},{"id":"https://openalex.org/keywords/analogue-electronics","display_name":"Analogue electronics","score":0.578288197517395},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.48790356516838074},{"id":"https://openalex.org/keywords/variable","display_name":"Variable (mathematics)","score":0.4807981550693512},{"id":"https://openalex.org/keywords/construct","display_name":"Construct (python library)","score":0.4689314663410187},{"id":"https://openalex.org/keywords/selection","display_name":"Selection (genetic algorithm)","score":0.460397869348526},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.45951831340789795},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.44878482818603516},{"id":"https://openalex.org/keywords/machine-learning","display_name":"Machine learning","score":0.43794557452201843},{"id":"https://openalex.org/keywords/graph-theory","display_name":"Graph theory","score":0.43264713883399963},{"id":"https://openalex.org/keywords/engineering-design-process","display_name":"Engineering design process","score":0.4234289228916168},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.41787683963775635},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.2759230136871338},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17381662130355835},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.15455397963523865}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7003421187400818},{"id":"https://openalex.org/C132525143","wikidata":"https://www.wikidata.org/wiki/Q141488","display_name":"Graph","level":2,"score":0.6029404401779175},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.578288197517395},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.48790356516838074},{"id":"https://openalex.org/C182365436","wikidata":"https://www.wikidata.org/wiki/Q50701","display_name":"Variable (mathematics)","level":2,"score":0.4807981550693512},{"id":"https://openalex.org/C2780801425","wikidata":"https://www.wikidata.org/wiki/Q5164392","display_name":"Construct (python library)","level":2,"score":0.4689314663410187},{"id":"https://openalex.org/C81917197","wikidata":"https://www.wikidata.org/wiki/Q628760","display_name":"Selection (genetic algorithm)","level":2,"score":0.460397869348526},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.45951831340789795},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.44878482818603516},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.43794557452201843},{"id":"https://openalex.org/C88230418","wikidata":"https://www.wikidata.org/wiki/Q131476","display_name":"Graph theory","level":2,"score":0.43264713883399963},{"id":"https://openalex.org/C34972735","wikidata":"https://www.wikidata.org/wiki/Q2920267","display_name":"Engineering design process","level":2,"score":0.4234289228916168},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.41787683963775635},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.2759230136871338},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17381662130355835},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.15455397963523865},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/iscas51556.2021.9401786","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas51556.2021.9401786","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},{"id":"pmh:oai:publications.polymtl.ca:49488","is_oa":false,"landing_page_url":"https://publications.polymtl.ca/49488/","pdf_url":null,"source":{"id":"https://openalex.org/S4306401013","display_name":"PolyPublie (\u00c9cole Polytechnique de Montr\u00e9al)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I45683168","host_organization_name":"Polytechnique Montr\u00e9al","host_organization_lineage":["https://openalex.org/I45683168"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Communication de conf\u00e9rence"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Peace, Justice and strong institutions","score":0.4399999976158142,"id":"https://metadata.un.org/sdg/16"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":28,"referenced_works":["https://openalex.org/W1481413712","https://openalex.org/W1491101179","https://openalex.org/W1586602118","https://openalex.org/W1738282844","https://openalex.org/W1999357165","https://openalex.org/W2012857900","https://openalex.org/W2023205960","https://openalex.org/W2026803795","https://openalex.org/W2039300364","https://openalex.org/W2048801731","https://openalex.org/W2083532000","https://openalex.org/W2085399494","https://openalex.org/W2096249093","https://openalex.org/W2104339053","https://openalex.org/W2105947266","https://openalex.org/W2112667233","https://openalex.org/W2120889849","https://openalex.org/W2127984126","https://openalex.org/W2141776905","https://openalex.org/W2147849504","https://openalex.org/W2171628979","https://openalex.org/W2212885014","https://openalex.org/W2365984593","https://openalex.org/W2536978283","https://openalex.org/W2774447934","https://openalex.org/W4237153210","https://openalex.org/W4255722531","https://openalex.org/W6680847180"],"related_works":["https://openalex.org/W1573459484","https://openalex.org/W2371541858","https://openalex.org/W2910687076","https://openalex.org/W4253571705","https://openalex.org/W2259166676","https://openalex.org/W2144937598","https://openalex.org/W4382874200","https://openalex.org/W4280591916","https://openalex.org/W2375192119","https://openalex.org/W2943998903"],"abstract_inverted_index":{"This":[0],"paper":[1],"proposes":[2],"a":[3,34,61,76,84],"methodology":[4,80,112],"based":[5],"on":[6,56],"machine":[7],"learning":[8],"to":[9,32,48,71],"find":[10],"apparent":[11],"causal":[12,35,59,89],"relations":[13],"between":[14],"performance":[15,51,74],"targets":[16],"and":[17,25,69,119],"design":[18,42,64,94,117,128],"variables":[19],"in":[20,97],"analog":[21,53],"circuits.":[22,54],"Diversified":[23],"filtering":[24],"wrapping":[26],"variable":[27],"selection":[28],"algorithms":[29],"are":[30],"utilized":[31],"construct":[33],"graph":[36,90],"that":[37,44,109],"identifies":[38],"the":[39,50,57,73,98,101,110,115,124],"major":[40],"circuit":[41,116],"parameters":[43],"can":[45,66,113],"be":[46,67],"used":[47],"optimize":[49,72],"of":[52,63,75],"Based":[55],"constructed":[58],"graph,":[60],"sequence":[62],"procedures":[65],"extracted":[68],"followed":[70],"design.":[77],"The":[78,87,105],"proposed":[79,111],"is":[81],"validated":[82],"using":[83],"two-stage":[85,103],"op-amp.":[86,104],"obtained":[88],"agrees":[91],"with":[92],"analytical":[93],"equations":[95],"published":[96],"literature":[99],"for":[100],"selected":[102],"results":[106],"also":[107],"show":[108],"accelerate":[114],"process":[118],"effectively":[120],"help":[121],"designers":[122],"understand":[123],"reasoning":[125],"behind":[126],"different":[127],"decisions.":[129]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":1}],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2025-10-10T00:00:00"}
