{"id":"https://openalex.org/W3159717212","doi":"https://doi.org/10.1109/iscas51556.2021.9401562","title":"Analog Layout Placement for FinFET Technology Using Reinforcement Learning","display_name":"Analog Layout Placement for FinFET Technology Using Reinforcement Learning","publication_year":2021,"publication_date":"2021-04-27","ids":{"openalex":"https://openalex.org/W3159717212","doi":"https://doi.org/10.1109/iscas51556.2021.9401562","mag":"3159717212"},"language":"en","primary_location":{"id":"doi:10.1109/iscas51556.2021.9401562","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas51556.2021.9401562","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5007540261","display_name":"Mehrnaz Ahmadi","orcid":null},"institutions":[{"id":"https://openalex.org/I130438778","display_name":"Memorial University of Newfoundland","ror":"https://ror.org/04haebc03","country_code":"CA","type":"education","lineage":["https://openalex.org/I130438778"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Mehrnaz Ahmadi","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Memorial University, St. John\u2019s, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Memorial University, St. John\u2019s, Canada","institution_ids":["https://openalex.org/I130438778"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100705837","display_name":"Lihong Zhang","orcid":"https://orcid.org/0000-0003-2946-8072"},"institutions":[{"id":"https://openalex.org/I130438778","display_name":"Memorial University of Newfoundland","ror":"https://ror.org/04haebc03","country_code":"CA","type":"education","lineage":["https://openalex.org/I130438778"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Lihong Zhang","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Memorial University, St. John\u2019s, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Memorial University, St. John\u2019s, Canada","institution_ids":["https://openalex.org/I130438778"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5007540261"],"corresponding_institution_ids":["https://openalex.org/I130438778"],"apc_list":null,"apc_paid":null,"fwci":1.6043,"has_fulltext":false,"cited_by_count":27,"citation_normalized_percentile":{"value":0.83063778,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/leverage","display_name":"Leverage (statistics)","score":0.7269555926322937},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7050085067749023},{"id":"https://openalex.org/keywords/reinforcement-learning","display_name":"Reinforcement learning","score":0.6648625135421753},{"id":"https://openalex.org/keywords/analog-multiplier","display_name":"Analog multiplier","score":0.5476499795913696},{"id":"https://openalex.org/keywords/analogue-electronics","display_name":"Analogue electronics","score":0.45443952083587646},{"id":"https://openalex.org/keywords/page-layout","display_name":"Page layout","score":0.44762206077575684},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4443154036998749},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3714750111103058},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3711010217666626},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.3520168662071228},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21144849061965942},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.1628870666027069},{"id":"https://openalex.org/keywords/analog-signal","display_name":"Analog signal","score":0.12773996591567993},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.12164396047592163},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.08784890174865723}],"concepts":[{"id":"https://openalex.org/C153083717","wikidata":"https://www.wikidata.org/wiki/Q6535263","display_name":"Leverage (statistics)","level":2,"score":0.7269555926322937},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7050085067749023},{"id":"https://openalex.org/C97541855","wikidata":"https://www.wikidata.org/wiki/Q830687","display_name":"Reinforcement learning","level":2,"score":0.6648625135421753},{"id":"https://openalex.org/C98142538","wikidata":"https://www.wikidata.org/wiki/Q485005","display_name":"Analog multiplier","level":4,"score":0.5476499795913696},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.45443952083587646},{"id":"https://openalex.org/C188985296","wikidata":"https://www.wikidata.org/wiki/Q868954","display_name":"Page layout","level":2,"score":0.44762206077575684},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4443154036998749},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3714750111103058},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3711010217666626},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.3520168662071228},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21144849061965942},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.1628870666027069},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.12773996591567993},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.12164396047592163},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.08784890174865723},{"id":"https://openalex.org/C112698675","wikidata":"https://www.wikidata.org/wiki/Q37038","display_name":"Advertising","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C144133560","wikidata":"https://www.wikidata.org/wiki/Q4830453","display_name":"Business","level":0,"score":0.0},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas51556.2021.9401562","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas51556.2021.9401562","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W22126472","https://openalex.org/W1602353090","https://openalex.org/W1719971006","https://openalex.org/W1727049600","https://openalex.org/W1970609371","https://openalex.org/W1980284003","https://openalex.org/W2010480731","https://openalex.org/W2030338488","https://openalex.org/W2332691800","https://openalex.org/W2335894895","https://openalex.org/W2381518922","https://openalex.org/W2539776105","https://openalex.org/W2809440998","https://openalex.org/W2905247075","https://openalex.org/W2945462300","https://openalex.org/W2994891834","https://openalex.org/W2997579412","https://openalex.org/W3036312847","https://openalex.org/W3047288794","https://openalex.org/W6600849004","https://openalex.org/W6645303437"],"related_works":["https://openalex.org/W2095772789","https://openalex.org/W2158977975","https://openalex.org/W2085627566","https://openalex.org/W1981652693","https://openalex.org/W1493881961","https://openalex.org/W3111330318","https://openalex.org/W2007222089","https://openalex.org/W133135164","https://openalex.org/W2008534674","https://openalex.org/W2094440401"],"abstract_inverted_index":{"Despite":[0],"all":[1],"efforts":[2],"being":[3],"made":[4],"to":[5,29,34,69,105,140],"ease":[6],"analog":[7,21,39,96,108,118,137],"layout":[8,40,97,119],"generation,":[9],"the":[10,18,36,44,48,52,63,70,80,115,123,132,141,147,156],"designers'":[11,49],"expertise":[12],"is":[13,101],"still":[14],"highly":[15],"demanded":[16],"in":[17,51,79,122],"process":[19],"of":[20,38,117],"IC":[22],"physical":[23],"design.":[24],"Recently,":[25],"some":[26],"endeavors":[27],"started":[28],"leverage":[30],"artificial":[31],"intelligence":[32],"(AI)":[33],"tackle":[35],"complexity":[37],"optimization":[41,157],"and":[42],"alleviate":[43],"high":[45],"demand":[46],"for":[47],"experience":[50],"design":[53],"process.":[54],"However,":[55],"these":[56],"methods,":[57],"which":[58],"mainly":[59],"rely":[60],"on":[61],"using":[62],"previous":[64],"designs,":[65],"are":[66],"not":[67,77,102],"effective":[68],"unseen":[71,107],"data":[72],"(or":[73],"scenarios)":[74],"that":[75,92,131],"were":[76],"included":[78],"AI":[81],"training.":[82],"In":[83],"this":[84],"paper,":[85],"we":[86],"have":[87],"proposed":[88,133],"a":[89],"reinforcement-learning-based":[90],"method":[91,134],"can":[93,113,135],"fully":[94],"automate":[95],"placement":[98,109,120],"optimization.":[99],"It":[100],"only":[103],"applicable":[104],"any":[106],"scenarios,":[110],"but":[111],"also":[112],"meet":[114],"requirements":[116],"designs":[121],"advanced":[124],"FinFET":[125],"technology.":[126],"Our":[127],"experimental":[128],"results":[129],"show":[130],"place":[136],"modules":[138],"subject":[139],"defined":[142],"objectives":[143],"77x":[144],"faster":[145],"than":[146],"conventional":[148],"analytical":[149],"methods":[150],"(e.g.,":[151],"conjugate":[152],"gradient)":[153],"without":[154],"compromising":[155],"accuracy.":[158]},"counts_by_year":[{"year":2025,"cited_by_count":11},{"year":2024,"cited_by_count":6},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":7},{"year":2021,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
