{"id":"https://openalex.org/W3159713479","doi":"https://doi.org/10.1109/iscas51556.2021.9401543","title":"A 56 GHz 19 fs RMS-Jitter Sub-Sampling Phase-Locked Loop for 112 Gbit/s Transceivers","display_name":"A 56 GHz 19 fs RMS-Jitter Sub-Sampling Phase-Locked Loop for 112 Gbit/s Transceivers","publication_year":2021,"publication_date":"2021-04-27","ids":{"openalex":"https://openalex.org/W3159713479","doi":"https://doi.org/10.1109/iscas51556.2021.9401543","mag":"3159713479"},"language":"en","primary_location":{"id":"doi:10.1109/iscas51556.2021.9401543","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas51556.2021.9401543","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5086734803","display_name":"Patrick Kurth","orcid":"https://orcid.org/0000-0002-6164-5756"},"institutions":[{"id":"https://openalex.org/I4577782","display_name":"Technische Universit\u00e4t Berlin","ror":"https://ror.org/03v4gjf40","country_code":"DE","type":"education","lineage":["https://openalex.org/I4577782"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"P. Kurth","raw_affiliation_strings":["Mixed Signal Circuit Design, Technische Universit\u00e4t Berlin, Berlin, Germany"],"affiliations":[{"raw_affiliation_string":"Mixed Signal Circuit Design, Technische Universit\u00e4t Berlin, Berlin, Germany","institution_ids":["https://openalex.org/I4577782"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5056597969","display_name":"Kai Misselwitz","orcid":"https://orcid.org/0000-0001-7495-5676"},"institutions":[{"id":"https://openalex.org/I4577782","display_name":"Technische Universit\u00e4t Berlin","ror":"https://ror.org/03v4gjf40","country_code":"DE","type":"education","lineage":["https://openalex.org/I4577782"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"K. Misselwitz","raw_affiliation_strings":["Mixed Signal Circuit Design, Technische Universit\u00e4t Berlin, Berlin, Germany"],"affiliations":[{"raw_affiliation_string":"Mixed Signal Circuit Design, Technische Universit\u00e4t Berlin, Berlin, Germany","institution_ids":["https://openalex.org/I4577782"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047624328","display_name":"Urs Hecht","orcid":"https://orcid.org/0000-0003-3693-4553"},"institutions":[{"id":"https://openalex.org/I4577782","display_name":"Technische Universit\u00e4t Berlin","ror":"https://ror.org/03v4gjf40","country_code":"DE","type":"education","lineage":["https://openalex.org/I4577782"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"U. Hecht","raw_affiliation_strings":["Mixed Signal Circuit Design, Technische Universit\u00e4t Berlin, Berlin, Germany"],"affiliations":[{"raw_affiliation_string":"Mixed Signal Circuit Design, Technische Universit\u00e4t Berlin, Berlin, Germany","institution_ids":["https://openalex.org/I4577782"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5032302022","display_name":"Friedel Gerfers","orcid":"https://orcid.org/0000-0002-0520-1923"},"institutions":[{"id":"https://openalex.org/I4577782","display_name":"Technische Universit\u00e4t Berlin","ror":"https://ror.org/03v4gjf40","country_code":"DE","type":"education","lineage":["https://openalex.org/I4577782"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"F. Gerfers","raw_affiliation_strings":["Mixed Signal Circuit Design, Technische Universit\u00e4t Berlin, Berlin, Germany"],"affiliations":[{"raw_affiliation_string":"Mixed Signal Circuit Design, Technische Universit\u00e4t Berlin, Berlin, Germany","institution_ids":["https://openalex.org/I4577782"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5086734803"],"corresponding_institution_ids":["https://openalex.org/I4577782"],"apc_list":null,"apc_paid":null,"fwci":0.1003,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.40569727,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"56","issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.8106426000595093},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.7939265966415405},{"id":"https://openalex.org/keywords/transceiver","display_name":"Transceiver","score":0.7338025569915771},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.7094696760177612},{"id":"https://openalex.org/keywords/resonator","display_name":"Resonator","score":0.4829534888267517},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.453212708234787},{"id":"https://openalex.org/keywords/sampling","display_name":"Sampling (signal processing)","score":0.45104289054870605},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.4297224283218384},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4109859764575958},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.35906845331192017},{"id":"https://openalex.org/keywords/optics","display_name":"Optics","score":0.348996102809906},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.3195096254348755},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22506844997406006},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.09107539057731628}],"concepts":[{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.8106426000595093},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.7939265966415405},{"id":"https://openalex.org/C7720470","wikidata":"https://www.wikidata.org/wiki/Q954187","display_name":"Transceiver","level":3,"score":0.7338025569915771},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.7094696760177612},{"id":"https://openalex.org/C97126364","wikidata":"https://www.wikidata.org/wiki/Q349669","display_name":"Resonator","level":2,"score":0.4829534888267517},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.453212708234787},{"id":"https://openalex.org/C140779682","wikidata":"https://www.wikidata.org/wiki/Q210868","display_name":"Sampling (signal processing)","level":3,"score":0.45104289054870605},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.4297224283218384},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4109859764575958},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.35906845331192017},{"id":"https://openalex.org/C120665830","wikidata":"https://www.wikidata.org/wiki/Q14620","display_name":"Optics","level":1,"score":0.348996102809906},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.3195096254348755},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22506844997406006},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.09107539057731628},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas51556.2021.9401543","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas51556.2021.9401543","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8399999737739563,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1530571791","https://openalex.org/W2079098101","https://openalex.org/W2099801150","https://openalex.org/W2102596261","https://openalex.org/W2116505951","https://openalex.org/W2121896699","https://openalex.org/W2146606114","https://openalex.org/W2172850778","https://openalex.org/W2605666562","https://openalex.org/W2792914784","https://openalex.org/W2942143322","https://openalex.org/W2952156678","https://openalex.org/W3004354595","https://openalex.org/W3010157123","https://openalex.org/W3016105450","https://openalex.org/W3214506790","https://openalex.org/W6681887207","https://openalex.org/W6773390323"],"related_works":["https://openalex.org/W1994021281","https://openalex.org/W2139484866","https://openalex.org/W2474043983","https://openalex.org/W2008250178","https://openalex.org/W2078513307","https://openalex.org/W2566880546","https://openalex.org/W2544336511","https://openalex.org/W2144737022","https://openalex.org/W1978186604","https://openalex.org/W2124954209"],"abstract_inverted_index":{"This":[0,102],"paper":[1],"presents":[2],"a":[3,24,32,38,88],"56":[4,103],"GHz":[5,104],"Sub-Sampling":[6],"Phase-Locked":[7],"Loop":[8],"(SSPLL)":[9],"for":[10,28,48,56],"an":[11,17,80],"optical":[12,109],"transceiver":[13],"system.":[14],"It":[15],"employs":[16],"LC":[18],"oscillator":[19],"without":[20],"frequency":[21],"multiplier":[22],"featuring":[23],"novel":[25],"combined":[26],"resonator":[27],"high":[29,49],"purity":[30],"signals,":[31],"differential":[33],"track-and-hold":[34],"with":[35,41,112],"dummy":[36],"samplers,":[37],"charge":[39],"pump":[40],"feedback":[42],"amplifiers":[43],"and":[44],"specialized":[45],"input":[46],"pairs":[47],"voltage":[50],"operation.":[51],"The":[52,76],"sub-sampling":[53],"architecture":[54],"allows":[55],"ultra-low":[57],"phase":[58,66,77],"noise":[59,67,78],"at":[60,79],"low":[61],"offset":[62],"frequencies,":[63],"while":[64],"far-out":[65],"is":[68],"minimized":[69],"due":[70],"to":[71,83,99],"the":[72],"used":[73],"high-purity":[74],"oscillator.":[75],"1MHz":[81],"amounts":[82],"-":[84],"127dBc/Hz,":[85],"resulting":[86],"in":[87],"total":[89],"integrated":[90],"jitter":[91],"of":[92],"19":[93],"fs":[94],"(range":[95],"from":[96],"1":[97,100],"kHz":[98],"GHz).":[101],"SSPLL":[105],"enables":[106],"next-generation":[107],"wire-line":[108],"communication":[110],"standards":[111],"over":[113],"100Gbit/s.":[114]},"counts_by_year":[{"year":2022,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}