{"id":"https://openalex.org/W3157621388","doi":"https://doi.org/10.1109/iscas51556.2021.9401508","title":"An Energy-Efficient Logic Cell Library Design Methodology with Fine Granularity of Driving Strength for Near- and Sub-Threshold Digital Circuits","display_name":"An Energy-Efficient Logic Cell Library Design Methodology with Fine Granularity of Driving Strength for Near- and Sub-Threshold Digital Circuits","publication_year":2021,"publication_date":"2021-04-27","ids":{"openalex":"https://openalex.org/W3157621388","doi":"https://doi.org/10.1109/iscas51556.2021.9401508","mag":"3157621388"},"language":"en","primary_location":{"id":"doi:10.1109/iscas51556.2021.9401508","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas51556.2021.9401508","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100397041","display_name":"Hao Zhang","orcid":"https://orcid.org/0000-0003-3027-0485"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Hao Zhang","raw_affiliation_strings":["School of Microelectronics, Shanghai Jiao Tong University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"School of Microelectronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101583945","display_name":"Weifeng He","orcid":"https://orcid.org/0000-0002-7753-644X"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Weifeng He","raw_affiliation_strings":["School of Microelectronics, Shanghai Jiao Tong University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"School of Microelectronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102022581","display_name":"Yanan Sun","orcid":"https://orcid.org/0000-0001-8281-9121"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yanan Sun","raw_affiliation_strings":["School of Microelectronics, Shanghai Jiao Tong University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"School of Microelectronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5047532313","display_name":"Member Mingoo Seok","orcid":null},"institutions":[{"id":"https://openalex.org/I78577930","display_name":"Columbia University","ror":"https://ror.org/00hj8s172","country_code":"US","type":"education","lineage":["https://openalex.org/I78577930"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Member Mingoo Seok","raw_affiliation_strings":["Department of Electrical Engineering, Columbia University, New York, NY 10027, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Columbia University, New York, NY 10027, USA","institution_ids":["https://openalex.org/I78577930"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5100397041"],"corresponding_institution_ids":["https://openalex.org/I183067930"],"apc_list":null,"apc_paid":null,"fwci":0.2005,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.48837038,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"15","issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/granularity","display_name":"Granularity","score":0.7702372074127197},{"id":"https://openalex.org/keywords/power-gating","display_name":"Power gating","score":0.6355657577514648},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.6127573847770691},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.6114834547042847},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6090673804283142},{"id":"https://openalex.org/keywords/threshold-voltage","display_name":"Threshold voltage","score":0.5957047939300537},{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.5865607857704163},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5663048028945923},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.555313229560852},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.5257916450500488},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.5141051411628723},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.5100908875465393},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4568957984447479},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.4334827959537506},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.4244103729724884},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.39529627561569214},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.2975851893424988},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2557511329650879},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22572514414787292},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.21697872877120972},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.208652526140213},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.11804032325744629}],"concepts":[{"id":"https://openalex.org/C177774035","wikidata":"https://www.wikidata.org/wiki/Q1246948","display_name":"Granularity","level":2,"score":0.7702372074127197},{"id":"https://openalex.org/C2780700455","wikidata":"https://www.wikidata.org/wiki/Q7236515","display_name":"Power gating","level":4,"score":0.6355657577514648},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.6127573847770691},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.6114834547042847},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6090673804283142},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.5957047939300537},{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.5865607857704163},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5663048028945923},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.555313229560852},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.5257916450500488},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.5141051411628723},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.5100908875465393},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4568957984447479},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.4334827959537506},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.4244103729724884},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.39529627561569214},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.2975851893424988},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2557511329650879},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22572514414787292},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.21697872877120972},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.208652526140213},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.11804032325744629},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas51556.2021.9401508","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas51556.2021.9401508","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"},{"id":"https://openalex.org/F4320310822","display_name":"Catalyst Foundation","ror":"https://ror.org/012jwf593"},{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1975918566","https://openalex.org/W1984402332","https://openalex.org/W1994098334","https://openalex.org/W2053774923","https://openalex.org/W2064167794","https://openalex.org/W2118396866","https://openalex.org/W2163728097","https://openalex.org/W2401293503","https://openalex.org/W2741512718","https://openalex.org/W2766979214","https://openalex.org/W2790760129","https://openalex.org/W2802267764","https://openalex.org/W2898682242","https://openalex.org/W2946673651","https://openalex.org/W4249018771","https://openalex.org/W4252820003"],"related_works":["https://openalex.org/W4244696039","https://openalex.org/W3013506364","https://openalex.org/W205205291","https://openalex.org/W2337636225","https://openalex.org/W2030607272","https://openalex.org/W2134697552","https://openalex.org/W2623440917","https://openalex.org/W2365114398","https://openalex.org/W2035113414","https://openalex.org/W2922751745"],"abstract_inverted_index":{"Commercial":[0],"multi-threshold":[1],"standard":[2,51],"logic":[3,32],"cell":[4,52],"libraries":[5,21],"are":[6],"designed":[7],"for":[8,45],"nominal":[9],"super-threshold":[10],"circuits.":[11,113],"If":[12],"blindly":[13],"used":[14],"at":[15,87,136],"near-":[16,48,149],"and":[17,34,49,78,103,129,150],"sub-threshold":[18,50,151],"voltages,":[19],"such":[20],"exhibit":[22],"excessively":[23],"coarse":[24],"granularity":[25,59],"in":[26,62,120,126,133,148],"driving":[27,57,85],"strength,":[28],"leading":[29],"to":[30,82],"sub-optimal":[31],"synthesis":[33],"placement-and-":[35],"routing":[36],"results.":[37],"To":[38],"tackle":[39],"this":[40,63],"problem,":[41],"a":[42,47,98,117,123,130],"holistic":[43],"methodology":[44,68,147],"designing":[46],"library":[53,102,109],"that":[54],"has":[55],"fine":[56],"strength":[58,86],"is":[60],"presented":[61],"paper.":[64],"Meanwhile,":[65],"the":[66,84,93,107,143,146],"proposed":[67,94],"leverages":[69],"inverse":[70],"narrow":[71],"width":[72],"effect,":[73],"reverse":[74],"short":[75],"channel":[76],"effect":[77],"forward":[79],"body":[80],"biasing":[81],"modulate":[83],"low":[88],"area":[89,138],"overheads.":[90],"Based":[91],"on":[92,140],"methodology,":[95],"we":[96],"develop":[97],"65nm":[99],"multi-threshold-voltage,":[100],"multi-channel-length":[101],"benchmark":[104],"it":[105],"against":[106],"commercial":[108],"across":[110],"several":[111],"common":[112],"The":[114],"results":[115],"show":[116],"26.6%":[118],"reduction":[119,125,132],"power-delay":[121],"product,":[122,128],"28.1%":[124],"energy-delay":[127],"27.0%":[131],"leakage":[134],"power":[135],"5.8%":[137],"overhead":[139],"average,":[141],"confirming":[142],"efficiency":[144],"of":[145],"digital":[152],"circuits":[153],"design.":[154]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2021,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
