{"id":"https://openalex.org/W4312659309","doi":"https://doi.org/10.1109/iscas48785.2022.9937781","title":"Compute-In-Memory Using 6T SRAM for a Wide Variety of Workloads","display_name":"Compute-In-Memory Using 6T SRAM for a Wide Variety of Workloads","publication_year":2022,"publication_date":"2022-05-28","ids":{"openalex":"https://openalex.org/W4312659309","doi":"https://doi.org/10.1109/iscas48785.2022.9937781"},"language":"en","primary_location":{"id":"doi:10.1109/iscas48785.2022.9937781","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas48785.2022.9937781","pdf_url":null,"source":{"id":"https://openalex.org/S4363604393","display_name":"2022 IEEE International Symposium on Circuits and Systems (ISCAS)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5060641326","display_name":"Pramod Kumar Bharti","orcid":"https://orcid.org/0000-0003-1154-1470"},"institutions":[{"id":"https://openalex.org/I27674431","display_name":"Indian Institute of Technology Gandhinagar","ror":"https://ror.org/0036p5w23","country_code":"IN","type":"education","lineage":["https://openalex.org/I27674431"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Pramod Kumar Bharti","raw_affiliation_strings":["Indian Institute of Technology Gandhinagar,India","Indian Institute of Technology Gandhinagar, India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Gandhinagar,India","institution_ids":["https://openalex.org/I27674431"]},{"raw_affiliation_string":"Indian Institute of Technology Gandhinagar, India","institution_ids":["https://openalex.org/I27674431"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102018893","display_name":"Saurabh Jain","orcid":"https://orcid.org/0000-0001-5830-8161"},"institutions":[{"id":"https://openalex.org/I4210146682","display_name":"Intel (India)","ror":"https://ror.org/04f2n1245","country_code":"IN","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210146682"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Saurabh Jain","raw_affiliation_strings":["Processor Architecture Research Lab, Intel Labs,India","Processor Architecture Research Lab, Intel Labs, India"],"affiliations":[{"raw_affiliation_string":"Processor Architecture Research Lab, Intel Labs,India","institution_ids":["https://openalex.org/I4210146682"]},{"raw_affiliation_string":"Processor Architecture Research Lab, Intel Labs, India","institution_ids":["https://openalex.org/I4210146682"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019281524","display_name":"Kamlesh Pillai","orcid":"https://orcid.org/0009-0002-2245-6263"},"institutions":[{"id":"https://openalex.org/I4210146682","display_name":"Intel (India)","ror":"https://ror.org/04f2n1245","country_code":"IN","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210146682"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Kamlesh R. Pillai","raw_affiliation_strings":["Processor Architecture Research Lab, Intel Labs,India","Processor Architecture Research Lab, Intel Labs, India"],"affiliations":[{"raw_affiliation_string":"Processor Architecture Research Lab, Intel Labs,India","institution_ids":["https://openalex.org/I4210146682"]},{"raw_affiliation_string":"Processor Architecture Research Lab, Intel Labs, India","institution_ids":["https://openalex.org/I4210146682"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008430968","display_name":"Sagar Varma Sayyaparaju","orcid":null},"institutions":[{"id":"https://openalex.org/I4210146682","display_name":"Intel (India)","ror":"https://ror.org/04f2n1245","country_code":"IN","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210146682"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Sagar Varma Sayyaparaju","raw_affiliation_strings":["Processor Architecture Research Lab, Intel Labs,India","Processor Architecture Research Lab, Intel Labs, India"],"affiliations":[{"raw_affiliation_string":"Processor Architecture Research Lab, Intel Labs,India","institution_ids":["https://openalex.org/I4210146682"]},{"raw_affiliation_string":"Processor Architecture Research Lab, Intel Labs, India","institution_ids":["https://openalex.org/I4210146682"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072395015","display_name":"Gurpreet S. Kalsi","orcid":"https://orcid.org/0009-0000-7018-7585"},"institutions":[{"id":"https://openalex.org/I4210146682","display_name":"Intel (India)","ror":"https://ror.org/04f2n1245","country_code":"IN","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210146682"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Gurpreet S. Kalsi","raw_affiliation_strings":["Processor Architecture Research Lab, Intel Labs,India","Processor Architecture Research Lab, Intel Labs, India"],"affiliations":[{"raw_affiliation_string":"Processor Architecture Research Lab, Intel Labs,India","institution_ids":["https://openalex.org/I4210146682"]},{"raw_affiliation_string":"Processor Architecture Research Lab, Intel Labs, India","institution_ids":["https://openalex.org/I4210146682"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080209114","display_name":"Joycee Mekie","orcid":"https://orcid.org/0000-0001-9646-1941"},"institutions":[{"id":"https://openalex.org/I27674431","display_name":"Indian Institute of Technology Gandhinagar","ror":"https://ror.org/0036p5w23","country_code":"IN","type":"education","lineage":["https://openalex.org/I27674431"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Joycee Mekie","raw_affiliation_strings":["Indian Institute of Technology Gandhinagar,India","Indian Institute of Technology Gandhinagar, India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Gandhinagar,India","institution_ids":["https://openalex.org/I27674431"]},{"raw_affiliation_string":"Indian Institute of Technology Gandhinagar, India","institution_ids":["https://openalex.org/I27674431"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5036799188","display_name":"Sreenivas Subramoney","orcid":"https://orcid.org/0000-0001-5372-0173"},"institutions":[{"id":"https://openalex.org/I4210146682","display_name":"Intel (India)","ror":"https://ror.org/04f2n1245","country_code":"IN","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210146682"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Sreenivas Subramoney","raw_affiliation_strings":["Processor Architecture Research Lab, Intel Labs,India","Processor Architecture Research Lab, Intel Labs, India"],"affiliations":[{"raw_affiliation_string":"Processor Architecture Research Lab, Intel Labs,India","institution_ids":["https://openalex.org/I4210146682"]},{"raw_affiliation_string":"Processor Architecture Research Lab, Intel Labs, India","institution_ids":["https://openalex.org/I4210146682"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5060641326"],"corresponding_institution_ids":["https://openalex.org/I27674431"],"apc_list":null,"apc_paid":null,"fwci":1.6112,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.84037989,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"2963","last_page":"2967"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7995809316635132},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.707998514175415},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.5776105523109436},{"id":"https://openalex.org/keywords/quantization","display_name":"Quantization (signal processing)","score":0.5293501019477844},{"id":"https://openalex.org/keywords/operand","display_name":"Operand","score":0.5154210329055786},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5023083686828613},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4623244106769562},{"id":"https://openalex.org/keywords/sign","display_name":"Sign (mathematics)","score":0.4590024948120117},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.45830395817756653},{"id":"https://openalex.org/keywords/energy","display_name":"Energy (signal processing)","score":0.4540359675884247},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.4464595913887024},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4297483563423157},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2954881191253662},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.09622958302497864},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.08963149785995483},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.0757913887500763},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.07245022058486938}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7995809316635132},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.707998514175415},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.5776105523109436},{"id":"https://openalex.org/C28855332","wikidata":"https://www.wikidata.org/wiki/Q198099","display_name":"Quantization (signal processing)","level":2,"score":0.5293501019477844},{"id":"https://openalex.org/C55526617","wikidata":"https://www.wikidata.org/wiki/Q719375","display_name":"Operand","level":2,"score":0.5154210329055786},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5023083686828613},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4623244106769562},{"id":"https://openalex.org/C139676723","wikidata":"https://www.wikidata.org/wiki/Q1193832","display_name":"Sign (mathematics)","level":2,"score":0.4590024948120117},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.45830395817756653},{"id":"https://openalex.org/C186370098","wikidata":"https://www.wikidata.org/wiki/Q442787","display_name":"Energy (signal processing)","level":2,"score":0.4540359675884247},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.4464595913887024},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4297483563423157},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2954881191253662},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.09622958302497864},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.08963149785995483},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0757913887500763},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.07245022058486938},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas48785.2022.9937781","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas48785.2022.9937781","pdf_url":null,"source":{"id":"https://openalex.org/S4363604393","display_name":"2022 IEEE International Symposium on Circuits and Systems (ISCAS)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.9100000262260437}],"awards":[],"funders":[{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"},{"id":"https://openalex.org/F4320334771","display_name":"Science and Engineering Research Board","ror":"https://ror.org/03ffdsr55"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W2331783522","https://openalex.org/W2527492855","https://openalex.org/W2593564159","https://openalex.org/W2594492285","https://openalex.org/W2742608242","https://openalex.org/W2775637085","https://openalex.org/W2790511620","https://openalex.org/W2790556218","https://openalex.org/W2792893539","https://openalex.org/W2898913080","https://openalex.org/W2922487710","https://openalex.org/W2964176059","https://openalex.org/W2966285227","https://openalex.org/W3000301330","https://openalex.org/W3015432327","https://openalex.org/W3091813699","https://openalex.org/W3104353813","https://openalex.org/W3180627186","https://openalex.org/W6727867346"],"related_works":["https://openalex.org/W2556282987","https://openalex.org/W1533508804","https://openalex.org/W2050923821","https://openalex.org/W2506885233","https://openalex.org/W1970370079","https://openalex.org/W2333680585","https://openalex.org/W2098637578","https://openalex.org/W1999746819","https://openalex.org/W1996625680","https://openalex.org/W4378651692"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,72,145],"split":[4,21,61],"wordline":[5,62],"6T":[6,25,63,77],"SRAM":[7],"based":[8,79],"compute-in-memory":[9,80],"subarray":[10],"with":[11,158],"variable":[12],"multi-bit":[13],"precision":[14,111],"for":[15,51,75,109],"input":[16],"operands":[17],"and":[18,35,87,93,97,105,119,131],"outputs.":[19],"The":[20,39,82,116],"wordlines":[22],"of":[23,47,58,112,122,149],"the":[24,45,48,60,94,123,141,159],"cell":[26,64,78],"enable":[27],"sign":[28],"segregation,":[29],"thus":[30],"allowing":[31],"arbitrary":[32,40],"sign/magnitude":[33],"multiply":[34],"accumulate":[36],"(MAC)":[37],"operations.":[38],"signmagnitude":[41],"MAC":[42,49],"operation":[43],"extends":[44],"usage":[46],"array":[50],"DSP":[52],"workloads":[53],"as":[54,151],"well.":[55],"On":[56],"top":[57],"that,":[59],"is":[65,71],"more":[66],"resilient":[67],"to":[68,101,127,153],"write-disturb,":[69],"which":[70],"major":[73],"concern":[74],"conventional":[76],"operation.":[81],"proposed":[83,142],"system":[84,143],"was":[85],"designed":[86],"implemented":[88],"using":[89],"65nm":[90],"UMC":[91],"technology":[92],"energy":[95,120],"efficiency":[96,121],"throughput":[98,118],"are":[99,125],"found":[100,126],"be":[102,128],"80.1":[103],"TOPS/W":[104,133],"496":[106],"GOPS":[107,130],"respectively,":[108],"maximum":[110,117,146],"inputs(4":[113],"bits)/outputs(5":[114],"bits).":[115],"design":[124],"780":[129],"94.8":[132],"respectively.":[134],"Hand-written":[135],"digit":[136],"recognition":[137],"application":[138],"mapped":[139],"on":[140],"showed":[144],"accuracy":[147],"degradation":[148],"0.2%":[150],"compared":[152],"that":[154],"obtained":[155],"from":[156],"software":[157],"same":[160],"input/output":[161],"quantization.":[162]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}