{"id":"https://openalex.org/W4312315380","doi":"https://doi.org/10.1109/iscas48785.2022.9937462","title":"BSRA: Block-based Super Resolution Accelerator with Hardware Efficient Pixel Attention","display_name":"BSRA: Block-based Super Resolution Accelerator with Hardware Efficient Pixel Attention","publication_year":2022,"publication_date":"2022-05-28","ids":{"openalex":"https://openalex.org/W4312315380","doi":"https://doi.org/10.1109/iscas48785.2022.9937462"},"language":"en","primary_location":{"id":"doi:10.1109/iscas48785.2022.9937462","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas48785.2022.9937462","pdf_url":null,"source":{"id":"https://openalex.org/S4363604393","display_name":"2022 IEEE International Symposium on Circuits and Systems (ISCAS)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5045306849","display_name":"Dun-Hao Yang","orcid":null},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Dun-Hao Yang","raw_affiliation_strings":["Institute of Electronics, National Yang Ming Chiao Tung University,Hsinchu,Taiwan","Institute of Electronics, National Yang Ming Chiao Tung University, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Electronics, National Yang Ming Chiao Tung University,Hsinchu,Taiwan","institution_ids":["https://openalex.org/I148366613"]},{"raw_affiliation_string":"Institute of Electronics, National Yang Ming Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5067793643","display_name":"Tian\u2010Sheuan Chang","orcid":"https://orcid.org/0000-0002-0561-8745"},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Tian-Sheuan Chang","raw_affiliation_strings":["Institute of Electronics, National Yang Ming Chiao Tung University,Hsinchu,Taiwan","Institute of Electronics, National Yang Ming Chiao Tung University, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Electronics, National Yang Ming Chiao Tung University,Hsinchu,Taiwan","institution_ids":["https://openalex.org/I148366613"]},{"raw_affiliation_string":"Institute of Electronics, National Yang Ming Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I148366613"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"2821","last_page":"2825"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11105","display_name":"Advanced Image Processing Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11105","display_name":"Advanced Image Processing Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10531","display_name":"Advanced Vision and Imaging","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13114","display_name":"Image Processing Techniques and Applications","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2214","display_name":"Media Technology"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8031273484230042},{"id":"https://openalex.org/keywords/pixel","display_name":"Pixel","score":0.7147954702377319},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.6639615297317505},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.6023656725883484},{"id":"https://openalex.org/keywords/convolutional-neural-network","display_name":"Convolutional neural network","score":0.5763065814971924},{"id":"https://openalex.org/keywords/convolution","display_name":"Convolution (computer science)","score":0.5711056590080261},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.5543083548545837},{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"Hardware acceleration","score":0.5351029634475708},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.44003990292549133},{"id":"https://openalex.org/keywords/memory-bandwidth","display_name":"Memory bandwidth","score":0.43210434913635254},{"id":"https://openalex.org/keywords/image-resolution","display_name":"Image resolution","score":0.4164505898952484},{"id":"https://openalex.org/keywords/iterative-reconstruction","display_name":"Iterative reconstruction","score":0.4103085696697235},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.40231621265411377},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.33682680130004883},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.18186351656913757},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.1592256724834442},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09729275107383728}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8031273484230042},{"id":"https://openalex.org/C160633673","wikidata":"https://www.wikidata.org/wiki/Q355198","display_name":"Pixel","level":2,"score":0.7147954702377319},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.6639615297317505},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.6023656725883484},{"id":"https://openalex.org/C81363708","wikidata":"https://www.wikidata.org/wiki/Q17084460","display_name":"Convolutional neural network","level":2,"score":0.5763065814971924},{"id":"https://openalex.org/C45347329","wikidata":"https://www.wikidata.org/wiki/Q5166604","display_name":"Convolution (computer science)","level":3,"score":0.5711056590080261},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.5543083548545837},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.5351029634475708},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.44003990292549133},{"id":"https://openalex.org/C188045654","wikidata":"https://www.wikidata.org/wiki/Q17148339","display_name":"Memory bandwidth","level":2,"score":0.43210434913635254},{"id":"https://openalex.org/C205372480","wikidata":"https://www.wikidata.org/wiki/Q210521","display_name":"Image resolution","level":2,"score":0.4164505898952484},{"id":"https://openalex.org/C141379421","wikidata":"https://www.wikidata.org/wiki/Q6094427","display_name":"Iterative reconstruction","level":2,"score":0.4103085696697235},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.40231621265411377},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.33682680130004883},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.18186351656913757},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.1592256724834442},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09729275107383728},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas48785.2022.9937462","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas48785.2022.9937462","pdf_url":null,"source":{"id":"https://openalex.org/S4363604393","display_name":"2022 IEEE International Symposium on Circuits and Systems (ISCAS)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.41999998688697815,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320309618","display_name":"Ministry of Science and Technology","ror":"https://ror.org/02b207r52"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1885185971","https://openalex.org/W2503339013","https://openalex.org/W2866634454","https://openalex.org/W2954930822","https://openalex.org/W2963645458","https://openalex.org/W3019314437","https://openalex.org/W3047237654","https://openalex.org/W3094627520","https://openalex.org/W3133531783","https://openalex.org/W3163130003","https://openalex.org/W6639309558","https://openalex.org/W6750797697"],"related_works":["https://openalex.org/W3052481912","https://openalex.org/W4312417841","https://openalex.org/W2766634277","https://openalex.org/W2971742398","https://openalex.org/W3127017759","https://openalex.org/W2755240195","https://openalex.org/W2961623865","https://openalex.org/W4213228110","https://openalex.org/W3116252251","https://openalex.org/W1604511055"],"abstract_inverted_index":{"Increasingly,":[0],"convolution":[1,89],"neural":[2],"network":[3,37],"(CNN)":[4],"based":[5],"super":[6,52],"resolution":[7,53],"models":[8],"have":[9],"been":[10],"proposed":[11],"for":[12,90],"better":[13,74],"reconstruction":[14,75,129],"results,":[15],"but":[16,70],"their":[17,25],"large":[18],"model":[19,86,92,101],"size":[20],"and":[21,38,43,67,103,109],"complicated":[22],"structure":[23,69],"inhibit":[24],"real-time":[26],"hardware":[27,30,54,57],"implementation.":[28],"Current":[29],"designs":[31],"are":[32,112],"limited":[33],"to":[34,95,100],"a":[35,51],"plain":[36],"suffer":[39],"from":[40],"lower":[41],"quality":[42],"high":[44],"memory":[45,98],"bandwidth":[46],"requirements.":[47],"This":[48],"paper":[49],"proposes":[50],"accelerator":[55,83],"with":[56,118,135],"efficient":[58],"pixel":[59,110],"attention":[60,111],"that":[61],"just":[62],"needs":[63],"25.":[64],"9K":[65],"parameters":[66],"simple":[68],"achieves":[71],"0.":[72],"38dB":[73],"images":[76],"than":[77],"the":[78],"widely":[79],"used":[80],"FSRCNN.":[81],"The":[82,121],"adopts":[84],"full":[85,91,126],"block":[87],"wise":[88],"layer":[93],"fusion":[94],"reduce":[96],"external":[97],"access":[99],"input":[102],"output":[104],"only.":[105],"In":[106],"addition,":[107],"CNN":[108],"well":[113],"supported":[114],"by":[115],"PE":[116],"arrays":[117],"distributed":[119],"weights.":[120],"final":[122],"implementation":[123],"can":[124],"support":[125],"HD":[127],"image":[128],"at":[130],"30":[131],"frames":[132],"per":[133],"second":[134],"TSMC":[136],"40nm":[137],"CMOS":[138],"process.":[139]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":3}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}