{"id":"https://openalex.org/W4312571564","doi":"https://doi.org/10.1109/iscas48785.2022.9937255","title":"Power Efficient Echo-Cancellation Based Hybrid for Full-Duplex Chip-to-Chip Interconnects","display_name":"Power Efficient Echo-Cancellation Based Hybrid for Full-Duplex Chip-to-Chip Interconnects","publication_year":2022,"publication_date":"2022-05-28","ids":{"openalex":"https://openalex.org/W4312571564","doi":"https://doi.org/10.1109/iscas48785.2022.9937255"},"language":"en","primary_location":{"id":"doi:10.1109/iscas48785.2022.9937255","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas48785.2022.9937255","pdf_url":null,"source":{"id":"https://openalex.org/S4363604393","display_name":"2022 IEEE International Symposium on Circuits and Systems (ISCAS)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5047704529","display_name":"Prema Kumar Govindaswamy","orcid":null},"institutions":[{"id":"https://openalex.org/I36893310","display_name":"University of Hyderabad","ror":"https://ror.org/04a7rxb17","country_code":"IN","type":"education","lineage":["https://openalex.org/I36893310"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Prema Kumar Govindaswamy","raw_affiliation_strings":["University of Hyderabad,Centre for Advanced Studies in Electronics Science and Technology,Hyderabad,India","Centre for Advanced Studies in Electronics Science and Technology, University of Hyderabad, Hyderabad, India"],"affiliations":[{"raw_affiliation_string":"University of Hyderabad,Centre for Advanced Studies in Electronics Science and Technology,Hyderabad,India","institution_ids":["https://openalex.org/I36893310"]},{"raw_affiliation_string":"Centre for Advanced Studies in Electronics Science and Technology, University of Hyderabad, Hyderabad, India","institution_ids":["https://openalex.org/I36893310"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5014618593","display_name":"Nijwm Wary","orcid":"https://orcid.org/0000-0003-4363-7303"},"institutions":[{"id":"https://openalex.org/I99729588","display_name":"Indian Institute of Technology Bhubaneswar","ror":"https://ror.org/04gx72j20","country_code":"IN","type":"education","lineage":["https://openalex.org/I99729588"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Nijwm Wary","raw_affiliation_strings":["School of Electrical Sciences, Indian Institute of Technology,Bhubaneswar,Odisha,India","School of Electrical Sciences, Indian Institute of Technology, Bhubaneswar, Odisha, India"],"affiliations":[{"raw_affiliation_string":"School of Electrical Sciences, Indian Institute of Technology,Bhubaneswar,Odisha,India","institution_ids":["https://openalex.org/I99729588"]},{"raw_affiliation_string":"School of Electrical Sciences, Indian Institute of Technology, Bhubaneswar, Odisha, India","institution_ids":["https://openalex.org/I99729588"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5112225261","display_name":"Vijaya Sankara Rao Pasupureddi","orcid":null},"institutions":[{"id":"https://openalex.org/I99729588","display_name":"Indian Institute of Technology Bhubaneswar","ror":"https://ror.org/04gx72j20","country_code":"IN","type":"education","lineage":["https://openalex.org/I99729588"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Vijaya Sankara Rao Pasupureddi","raw_affiliation_strings":["School of Electrical Sciences, Indian Institute of Technology,Bhubaneswar,Odisha,India","School of Electrical Sciences, Indian Institute of Technology, Bhubaneswar, Odisha, India"],"affiliations":[{"raw_affiliation_string":"School of Electrical Sciences, Indian Institute of Technology,Bhubaneswar,Odisha,India","institution_ids":["https://openalex.org/I99729588"]},{"raw_affiliation_string":"School of Electrical Sciences, Indian Institute of Technology, Bhubaneswar, Odisha, India","institution_ids":["https://openalex.org/I99729588"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5047704529"],"corresponding_institution_ids":["https://openalex.org/I36893310"],"apc_list":null,"apc_paid":null,"fwci":1.2897,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.79223161,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"852","last_page":"856"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12791","display_name":"Full-Duplex Wireless Communications","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/transceiver","display_name":"Transceiver","score":0.713935911655426},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.574907124042511},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5297468900680542},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.5175294280052185},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.5071589946746826},{"id":"https://openalex.org/keywords/resistor","display_name":"Resistor","score":0.4953674077987671},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4640488028526306},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4154735803604126},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.39398691058158875},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3646613359451294}],"concepts":[{"id":"https://openalex.org/C7720470","wikidata":"https://www.wikidata.org/wiki/Q954187","display_name":"Transceiver","level":3,"score":0.713935911655426},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.574907124042511},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5297468900680542},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.5175294280052185},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.5071589946746826},{"id":"https://openalex.org/C137488568","wikidata":"https://www.wikidata.org/wiki/Q5321","display_name":"Resistor","level":3,"score":0.4953674077987671},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4640488028526306},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4154735803604126},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.39398691058158875},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3646613359451294}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas48785.2022.9937255","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas48785.2022.9937255","pdf_url":null,"source":{"id":"https://openalex.org/S4363604393","display_name":"2022 IEEE International Symposium on Circuits and Systems (ISCAS)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.9100000262260437,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320320767","display_name":"University Grants Commission","ror":"https://ror.org/04p800546"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1587699768","https://openalex.org/W1967453165","https://openalex.org/W2040730219","https://openalex.org/W2081089490","https://openalex.org/W2143155486","https://openalex.org/W2733802052","https://openalex.org/W2999607364","https://openalex.org/W3014543608","https://openalex.org/W3088791774","https://openalex.org/W6660700951"],"related_works":["https://openalex.org/W3200817179","https://openalex.org/W1960166976","https://openalex.org/W2783437851","https://openalex.org/W4249165909","https://openalex.org/W2380067098","https://openalex.org/W1992708211","https://openalex.org/W1548152478","https://openalex.org/W1672137312","https://openalex.org/W2115569193","https://openalex.org/W2161127017"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"an":[3,43,96,186],"energy":[4,175],"efficient":[5,102],"current-mode":[6,111],"hybrid":[7,52,95,114,119,168,184],"circuit":[8,53,115],"topology":[9,54],"for":[10,14,28,33,37,89,99],"echo-cancellation":[11],"is":[12,76,120,169,177],"proposed":[13,51,94,118],"full-duplex":[15,21,103],"signalling":[16],"over":[17,156],"chip-to-chip":[18],"interconnects.":[19],"Conventional":[20],"transceivers":[22],"consists":[23,55],"of":[24,56,66,86,131,148,166,182,188],"three":[25],"transcondutors,":[26],"namely,":[27],"transmitting":[29],"the":[30,46,50,67,71,74,84,93,107,138,167,173,183],"outbound":[31],"signal,":[32],"replica":[34,62],"generation":[35],"and":[36,61,112,172],"cancellation":[38],"or":[39],"subtraction,":[40],"leading":[41],"to":[42,106],"increase":[44],"in":[45,122],"power":[47,101,164],"consumption.":[48],"However,":[49],"only":[57],"two":[58],"transconductors,":[59],"transmitter":[60],"generator.":[63],"The":[64,117,134,162,180],"separation":[65],"inbound":[68],"signal":[69,72,145],"from":[70],"on":[73],"line":[75],"achieved":[77],"using":[78],"a":[79,128,142,157],"simple":[80],"resistor,":[81],"thereby":[82],"eliminating":[83],"need":[85],"additional":[87],"transconductor":[88],"subtraction.":[90],"This":[91],"makes":[92],"attractive":[97],"choice":[98],"realizing":[100],"transceiver":[104,109],"compared":[105],"existing":[108],"with":[110,127],"voltage-mode":[113],"topologies.":[116],"implemented":[121],"65":[123],"nm":[124],"CMOS":[125],"technology":[126],"supply":[129],"voltage":[130,146],"1.2":[132],"V.":[133],"post-layout":[135],"simulation":[136],"including":[137],"package":[139],"parasitic":[140],"has":[141],"differential":[143],"received":[144],"swing":[147],"85":[149],"mV":[150],"at":[151],"10":[152],"Gb/s":[153],"data":[154],"rate":[155],"20-cm":[158],"FR4":[159],"PCB":[160],"trace.":[161],"total":[163],"consumption":[165],"0.29":[170],"mW":[171],"corresponding":[174],"efficiency":[176],"0.057":[178],"pJ/bit.":[179],"layout":[181],"occupies":[185],"area":[187],"0.00025":[189],"mm":[190],"<sup":[191],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[192],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[193],".":[194]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}