{"id":"https://openalex.org/W4385080057","doi":"https://doi.org/10.1109/iscas46773.2023.10182084","title":"Computational Efficiency of Circuit Design and Optimization Algorithms: A Comparative Study","display_name":"Computational Efficiency of Circuit Design and Optimization Algorithms: A Comparative Study","publication_year":2023,"publication_date":"2023-05-21","ids":{"openalex":"https://openalex.org/W4385080057","doi":"https://doi.org/10.1109/iscas46773.2023.10182084"},"language":"en","primary_location":{"id":"doi:10.1109/iscas46773.2023.10182084","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas46773.2023.10182084","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101226221","display_name":"Alec Adair","orcid":null},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Alec Adair","raw_affiliation_strings":["University of Utah,Department of Electrical and Computer Engineering,Salt Lake City,Utah","Department of Electrical and Computer Engineering, University of Utah, Salt Lake City, Utah"],"affiliations":[{"raw_affiliation_string":"University of Utah,Department of Electrical and Computer Engineering,Salt Lake City,Utah","institution_ids":["https://openalex.org/I223532165"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Utah, Salt Lake City, Utah","institution_ids":["https://openalex.org/I223532165"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5052867620","display_name":"Armin Tajalli","orcid":"https://orcid.org/0000-0002-0222-3561"},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Armin Tajalli","raw_affiliation_strings":["University of Utah,Department of Electrical and Computer Engineering,Salt Lake City,Utah","Department of Electrical and Computer Engineering, University of Utah, Salt Lake City, Utah"],"affiliations":[{"raw_affiliation_string":"University of Utah,Department of Electrical and Computer Engineering,Salt Lake City,Utah","institution_ids":["https://openalex.org/I223532165"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Utah, Salt Lake City, Utah","institution_ids":["https://openalex.org/I223532165"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5101226221"],"corresponding_institution_ids":["https://openalex.org/I223532165"],"apc_list":null,"apc_paid":null,"fwci":0.5625,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.61484912,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6109359264373779},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5800686478614807},{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.5203544497489929},{"id":"https://openalex.org/keywords/automation","display_name":"Automation","score":0.45992618799209595},{"id":"https://openalex.org/keywords/analogue-electronics","display_name":"Analogue electronics","score":0.44693291187286377},{"id":"https://openalex.org/keywords/inverse","display_name":"Inverse","score":0.4409600794315338},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.4214611351490021},{"id":"https://openalex.org/keywords/design-of-experiments","display_name":"Design of experiments","score":0.4207850694656372},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.34243518114089966},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.24937030673027039},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12922149896621704},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.11850309371948242},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.11014950275421143}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6109359264373779},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5800686478614807},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.5203544497489929},{"id":"https://openalex.org/C115901376","wikidata":"https://www.wikidata.org/wiki/Q184199","display_name":"Automation","level":2,"score":0.45992618799209595},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.44693291187286377},{"id":"https://openalex.org/C207467116","wikidata":"https://www.wikidata.org/wiki/Q4385666","display_name":"Inverse","level":2,"score":0.4409600794315338},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.4214611351490021},{"id":"https://openalex.org/C34559072","wikidata":"https://www.wikidata.org/wiki/Q2334061","display_name":"Design of experiments","level":2,"score":0.4207850694656372},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.34243518114089966},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.24937030673027039},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12922149896621704},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.11850309371948242},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.11014950275421143},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas46773.2023.10182084","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas46773.2023.10182084","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.6299999952316284,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W2015105542","https://openalex.org/W2143033765","https://openalex.org/W2758603753","https://openalex.org/W3098917284","https://openalex.org/W4229941912","https://openalex.org/W4250589301","https://openalex.org/W4300833197"],"related_works":["https://openalex.org/W4327500672","https://openalex.org/W2545603903","https://openalex.org/W2391863233","https://openalex.org/W1970528334","https://openalex.org/W1992128702","https://openalex.org/W2734663060","https://openalex.org/W1563430967","https://openalex.org/W4391129830","https://openalex.org/W2373386111","https://openalex.org/W2306682566"],"abstract_inverted_index":{"Design":[0],"of":[1,41,82],"analog":[2,22,89],"circuits":[3],"is":[4,31],"a":[5,27,93],"computationally-complex":[6],"process.":[7],"Therefore,":[8],"robust,":[9],"simple,":[10],"and":[11,39,59],"efficient":[12],"algorithms":[13],"are":[14],"required":[15],"for":[16,99,113],"design":[17,23,44,85],"automation":[18],"purpose.":[19],"Developing":[20],"generalized":[21],"methodologies,":[24,45],"valid":[25],"across":[26],"large":[28],"solution":[29],"space,":[30],"very":[32],"demanding.":[33],"This":[34,102],"article":[35],"compares":[36],"computational":[37],"complexity":[38],"precision":[40],"three":[42,69],"different":[43],"i.e.,":[46,92],"g":[47],"<inf":[48,52,61],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[49,53,62],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">m</inf>":[50],"/I":[51],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">D</inf>":[54,63],",":[55,64],"Inversion":[56],"Coefficient,":[57],"IC,":[58],"C/I":[60],"or":[65],"Inverse-ID":[66],"approaches.":[67],"The":[68],"methodologies":[70],"will":[71],"be":[72],"analyzed":[73],"to":[74,78],"explore":[75],"their":[76],"performance":[77],"meet":[79],"basic":[80,88],"needs":[81],"the":[83,106,110],"circuit":[84,90],"industry.":[86],"A":[87],"block,":[91],"common-source":[94],"amplifier,":[95],"has":[96],"been":[97],"selected":[98],"this":[100],"analysis.":[101],"study":[103],"shows":[104],"that":[105],"C/ID":[107],"method":[108],"requires":[109],"least":[111],"approximation":[112],"optimization.":[114]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":2}],"updated_date":"2026-01-13T01:12:25.745995","created_date":"2025-10-10T00:00:00"}
