{"id":"https://openalex.org/W4385079952","doi":"https://doi.org/10.1109/iscas46773.2023.10182019","title":"A 26 Gb/s Echo-Cancellation Based Simultaneous Bidirectional Transceiver in 65 nm CMOS","display_name":"A 26 Gb/s Echo-Cancellation Based Simultaneous Bidirectional Transceiver in 65 nm CMOS","publication_year":2023,"publication_date":"2023-05-21","ids":{"openalex":"https://openalex.org/W4385079952","doi":"https://doi.org/10.1109/iscas46773.2023.10182019"},"language":"en","primary_location":{"id":"doi:10.1109/iscas46773.2023.10182019","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/iscas46773.2023.10182019","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102944090","display_name":"V. K. Surya","orcid":"https://orcid.org/0009-0003-3690-3885"},"institutions":[{"id":"https://openalex.org/I99729588","display_name":"Indian Institute of Technology Bhubaneswar","ror":"https://ror.org/04gx72j20","country_code":"IN","type":"education","lineage":["https://openalex.org/I99729588"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"V K Surya","raw_affiliation_strings":["IIT Bhubaneswar,Bhubaneswar,India","IIT Bhubaneswar, Bhubaneswar, India"],"affiliations":[{"raw_affiliation_string":"IIT Bhubaneswar,Bhubaneswar,India","institution_ids":["https://openalex.org/I99729588"]},{"raw_affiliation_string":"IIT Bhubaneswar, Bhubaneswar, India","institution_ids":["https://openalex.org/I99729588"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054621848","display_name":"Suraj Kumar Prusty","orcid":"https://orcid.org/0000-0002-7604-9156"},"institutions":[{"id":"https://openalex.org/I99729588","display_name":"Indian Institute of Technology Bhubaneswar","ror":"https://ror.org/04gx72j20","country_code":"IN","type":"education","lineage":["https://openalex.org/I99729588"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Suraj Kumar Prusty","raw_affiliation_strings":["IIT Bhubaneswar,Bhubaneswar,India","IIT Bhubaneswar, Bhubaneswar, India"],"affiliations":[{"raw_affiliation_string":"IIT Bhubaneswar,Bhubaneswar,India","institution_ids":["https://openalex.org/I99729588"]},{"raw_affiliation_string":"IIT Bhubaneswar, Bhubaneswar, India","institution_ids":["https://openalex.org/I99729588"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5014618593","display_name":"Nijwm Wary","orcid":"https://orcid.org/0000-0003-4363-7303"},"institutions":[{"id":"https://openalex.org/I99729588","display_name":"Indian Institute of Technology Bhubaneswar","ror":"https://ror.org/04gx72j20","country_code":"IN","type":"education","lineage":["https://openalex.org/I99729588"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Nijwm Wary","raw_affiliation_strings":["IIT Bhubaneswar,Bhubaneswar,India","IIT Bhubaneswar, Bhubaneswar, India"],"affiliations":[{"raw_affiliation_string":"IIT Bhubaneswar,Bhubaneswar,India","institution_ids":["https://openalex.org/I99729588"]},{"raw_affiliation_string":"IIT Bhubaneswar, Bhubaneswar, India","institution_ids":["https://openalex.org/I99729588"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5102944090"],"corresponding_institution_ids":["https://openalex.org/I99729588"],"apc_list":null,"apc_paid":null,"fwci":0.2674,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.52963473,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9955999851226807,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/transceiver","display_name":"Transceiver","score":0.9158642292022705},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7283896207809448},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5260374546051025},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4852018654346466},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.4765608608722687},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.47534796595573425},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.4273178279399872},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4152947962284088},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2776852548122406},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.24537432193756104}],"concepts":[{"id":"https://openalex.org/C7720470","wikidata":"https://www.wikidata.org/wiki/Q954187","display_name":"Transceiver","level":3,"score":0.9158642292022705},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7283896207809448},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5260374546051025},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4852018654346466},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.4765608608722687},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.47534796595573425},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.4273178279399872},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4152947962284088},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2776852548122406},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.24537432193756104},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas46773.2023.10182019","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/iscas46773.2023.10182019","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.9100000262260437}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1945065539","https://openalex.org/W1966288312","https://openalex.org/W1967453165","https://openalex.org/W2033733155","https://openalex.org/W2069654756","https://openalex.org/W2081089490","https://openalex.org/W2143155486","https://openalex.org/W2566986399","https://openalex.org/W2587329474","https://openalex.org/W2733802052","https://openalex.org/W2995181490","https://openalex.org/W2999607364","https://openalex.org/W3014543608","https://openalex.org/W3084511310","https://openalex.org/W3134685192"],"related_works":["https://openalex.org/W4249165909","https://openalex.org/W2783437851","https://openalex.org/W1672137312","https://openalex.org/W1650483958","https://openalex.org/W2320869333","https://openalex.org/W2110290642","https://openalex.org/W2744385696","https://openalex.org/W2136659592","https://openalex.org/W2115569193","https://openalex.org/W2161127017"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"a":[3,26,92],"current":[4],"mode":[5],"(CM)":[6],"full-duplex":[7],"simultaneous":[8,20],"bidirectional":[9,21,107],"(FD-SBD)":[10],"transceiver":[11,24,108],"has":[12,83],"been":[13,84],"presented":[14],"for":[15,91],"chip-to-chip":[16],"interconnect.":[17],"To":[18],"enable":[19],"communication,":[22],"the":[23,30,37,66,73,106,110],"incorporates":[25],"hybrid":[27,67],"network":[28,60,68],"in":[29],"receive":[31],"path,":[32],"which":[33],"not":[34],"only":[35],"eliminates":[36],"transmitted":[38],"signal":[39,77],"but":[40],"also":[41],"its":[42],"reflections":[43],"due":[44],"to":[45,69],"channel":[46,94],"imperfections.":[47],"A":[48],"front-end":[49],"programmable":[50],"active":[51],"delay":[52],"line":[53],"(PADL)":[54],"and":[55,71],"an":[56,113],"approximate":[57],"impedance":[58],"matching":[59],"(IMN)":[61],"at":[62,100,119],"replica":[63],"end":[64],"forms":[65],"move":[70],"reduce":[72],"echo":[74],"from":[75],"received":[76],"(RX)":[78],"sampling":[79],"point.":[80],"The":[81],"architecture":[82],"implemented":[85],"using":[86],"65":[87],"nm":[88],"CMOS":[89],"technology":[90],"short":[93],"with":[95,109],"4.375":[96],"dB":[97],"insertion":[98],"loss":[99],"7.5":[101],"GHz.":[102],"Post-layout":[103],"simulation":[104],"of":[105,116,123],"link,":[111],"gives":[112],"energy":[114],"efficiency":[115],"1.8":[117],"pJ/b,":[118],"aggregate":[120],"data":[121],"rate":[122],"26":[124],"Gb/s.":[125]},"counts_by_year":[{"year":2024,"cited_by_count":2}],"updated_date":"2025-12-22T23:10:17.713674","created_date":"2025-10-10T00:00:00"}
