{"id":"https://openalex.org/W4385679858","doi":"https://doi.org/10.1109/iscas46773.2023.10181899","title":"A multi-core memristor chip for Stochastic Binary STDP","display_name":"A multi-core memristor chip for Stochastic Binary STDP","publication_year":2023,"publication_date":"2023-05-21","ids":{"openalex":"https://openalex.org/W4385679858","doi":"https://doi.org/10.1109/iscas46773.2023.10181899"},"language":"en","primary_location":{"id":"doi:10.1109/iscas46773.2023.10181899","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas46773.2023.10181899","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5091451623","display_name":"Iv\u00e1n D\u00edez de los R\u00edos","orcid":"https://orcid.org/0000-0003-2703-6479"},"institutions":[{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]},{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"Iv\u00e1n D\u00edez de los R\u00edos","raw_affiliation_strings":["Instituto de Microelectrónica de Sevilla, IMSE-CNM (CSIC and Universidad de Sevilla),Seville,Spain"],"affiliations":[{"raw_affiliation_string":"Instituto de Microelectrónica de Sevilla, IMSE-CNM (CSIC and Universidad de Sevilla),Seville,Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006993163","display_name":"Luis A. Camu\u00f1as-Mesa","orcid":"https://orcid.org/0000-0002-3425-854X"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Luis Camu\u00f1as-Mesa","raw_affiliation_strings":["Instituto de Microelectrónica de Sevilla, IMSE-CNM (CSIC and Universidad de Sevilla),Seville,Spain"],"affiliations":[{"raw_affiliation_string":"Instituto de Microelectrónica de Sevilla, IMSE-CNM (CSIC and Universidad de Sevilla),Seville,Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5046458712","display_name":"Elisa Vianello","orcid":"https://orcid.org/0000-0002-8868-9951"},"institutions":[{"id":"https://openalex.org/I4210150049","display_name":"Laboratoire d'\u00c9lectronique des Technologies de l'Information","ror":"https://ror.org/04mf0wv34","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131","https://openalex.org/I2738703131","https://openalex.org/I4210117989","https://openalex.org/I4210150049"]},{"id":"https://openalex.org/I2738703131","display_name":"Commissariat \u00e0 l'\u00c9nergie Atomique et aux \u00c9nergies Alternatives","ror":"https://ror.org/00jjx8s55","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Elisa Vianello","raw_affiliation_strings":["CEA-Leti,Grenoble,France","CEA-Leti, Grenoble, France"],"affiliations":[{"raw_affiliation_string":"CEA-Leti,Grenoble,France","institution_ids":["https://openalex.org/I4210150049","https://openalex.org/I2738703131"]},{"raw_affiliation_string":"CEA-Leti, Grenoble, France","institution_ids":["https://openalex.org/I4210150049","https://openalex.org/I2738703131"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5082523790","display_name":"C. Reita","orcid":null},"institutions":[{"id":"https://openalex.org/I2738703131","display_name":"Commissariat \u00e0 l'\u00c9nergie Atomique et aux \u00c9nergies Alternatives","ror":"https://ror.org/00jjx8s55","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131"]},{"id":"https://openalex.org/I4210150049","display_name":"Laboratoire d'\u00c9lectronique des Technologies de l'Information","ror":"https://ror.org/04mf0wv34","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131","https://openalex.org/I2738703131","https://openalex.org/I4210117989","https://openalex.org/I4210150049"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Carlo Reita","raw_affiliation_strings":["CEA-Leti,Grenoble,France","CEA-Leti, Grenoble, France"],"affiliations":[{"raw_affiliation_string":"CEA-Leti,Grenoble,France","institution_ids":["https://openalex.org/I4210150049","https://openalex.org/I2738703131"]},{"raw_affiliation_string":"CEA-Leti, Grenoble, France","institution_ids":["https://openalex.org/I4210150049","https://openalex.org/I2738703131"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5079540787","display_name":"Teresa Serrano\u2010Gotarredona","orcid":"https://orcid.org/0000-0001-5714-2526"},"institutions":[{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]},{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Teresa Serrano-Gotarredona","raw_affiliation_strings":["Instituto de Microelectrónica de Sevilla, IMSE-CNM (CSIC and Universidad de Sevilla),Seville,Spain"],"affiliations":[{"raw_affiliation_string":"Instituto de Microelectrónica de Sevilla, IMSE-CNM (CSIC and Universidad de Sevilla),Seville,Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5025922642","display_name":"B. Linares-Barranco","orcid":"https://orcid.org/0000-0002-1813-4889"},"institutions":[{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]},{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Bernab\u00e9 Linares-Barranco","raw_affiliation_strings":["Instituto de Microelectrónica de Sevilla, IMSE-CNM (CSIC and Universidad de Sevilla),Seville,Spain"],"affiliations":[{"raw_affiliation_string":"Instituto de Microelectrónica de Sevilla, IMSE-CNM (CSIC and Universidad de Sevilla),Seville,Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5091451623"],"corresponding_institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"],"apc_list":null,"apc_paid":null,"fwci":0.2631,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.53311559,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10581","display_name":"Neural dynamics and brain function","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2805","display_name":"Cognitive Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/neuromorphic-engineering","display_name":"Neuromorphic engineering","score":0.9126251935958862},{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.6841065883636475},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6472584009170532},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6308581829071045},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5728222131729126},{"id":"https://openalex.org/keywords/spiking-neural-network","display_name":"Spiking neural network","score":0.5606240630149841},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.46074166893959045},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.35631847381591797},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.3271598815917969},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.25688862800598145},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.23402181267738342},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1562711000442505},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1307910978794098}],"concepts":[{"id":"https://openalex.org/C151927369","wikidata":"https://www.wikidata.org/wiki/Q1981312","display_name":"Neuromorphic engineering","level":3,"score":0.9126251935958862},{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.6841065883636475},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6472584009170532},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6308581829071045},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5728222131729126},{"id":"https://openalex.org/C11731999","wikidata":"https://www.wikidata.org/wiki/Q9067355","display_name":"Spiking neural network","level":3,"score":0.5606240630149841},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.46074166893959045},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.35631847381591797},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.3271598815917969},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.25688862800598145},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.23402181267738342},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1562711000442505},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1307910978794098},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/iscas46773.2023.10181899","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas46773.2023.10181899","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},{"id":"pmh:oai:HAL:cea-04751444v1","is_oa":false,"landing_page_url":"https://cea.hal.science/cea-04751444","pdf_url":null,"source":{"id":"https://openalex.org/S4406922461","display_name":"SPIRE - Sciences Po Institutional REpository","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"2023 IEEE International Symposium on Circuits and Systems (ISCAS), May 2023, Monterey, United States. pp.1-5, ⟨10.1109/ISCAS46773.2023.10181899⟩","raw_type":"Conference papers"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320335322","display_name":"European Regional Development Fund","ror":"https://ror.org/00k4n6c32"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1542981317","https://openalex.org/W1783145639","https://openalex.org/W1990404128","https://openalex.org/W2112181056","https://openalex.org/W2897802248","https://openalex.org/W2964810732","https://openalex.org/W2970585112","https://openalex.org/W3016048022","https://openalex.org/W4220999685","https://openalex.org/W4226353746","https://openalex.org/W4296079226","https://openalex.org/W4299286035"],"related_works":["https://openalex.org/W1872623660","https://openalex.org/W3207218810","https://openalex.org/W4292697011","https://openalex.org/W3212508523","https://openalex.org/W1995352804","https://openalex.org/W2909534142","https://openalex.org/W2086672837","https://openalex.org/W1940420793","https://openalex.org/W4367187682","https://openalex.org/W3215957123"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"the":[3,21,26,68],"design":[4,81],"of":[5,96],"a":[6,33,55,78,86,93],"monolithic":[7],"CMOS-memristive":[8,72],"neuromorphic":[9,73],"chip":[10],"performing":[11],"vector":[12],"matrix":[13],"multiplication":[14],"between":[15],"spike":[16],"coded":[17],"input":[18,42],"vectors":[19],"and":[20,43,88,113,136,146,152],"synaptic":[22,57,94],"weights":[23],"stored":[24],"in":[25,85,108],"memristive":[27,38,56],"array.":[28],"A":[29,50,102,120],"computing":[30,90],"core":[31,91,104],"including":[32],"$64\\times":[36],"64$":[37],"array":[39],"connecting":[40],"64":[41,44],"output":[45],"neurons":[46,135,145],"has":[47,63,105,116],"been":[48,64,106,117],"fabricated.":[49],"Spiking":[51],"Neural":[52],"Network":[53],"with":[54,67,92,123],"layer":[58],"exhibiting":[59],"Stochastic":[60],"Binary":[61],"Spike-Time-Dependent-Plasticity":[62],"experimentally":[65,118],"demonstrated":[66],"fabricated":[69,107],"core.":[70],"The":[71],"processor":[74],"is":[75,150],"designed":[76],"following":[77],"compact":[79],"pseudo-CMOL":[80],"style":[82],"that":[83],"results":[84],"modular":[87],"scalable":[89],"density":[95],"22Ksynapses/mm":[97],"2":[100],".":[101],"single":[103],"CEA-LETI":[109],"130nm":[110],"CMOS-RRAM":[111],"technology":[112],"its":[114],"operation":[115],"characterized.":[119],"multicore":[121],"architecture":[122],"reconfigurable":[124],"connectivity,":[125],"where":[126],"cores":[127],"can":[128],"be":[129],"interconnected":[130],"to":[131],"either":[132],"share":[133,143],"pre-synaptic":[134,148],"expand":[137,147],"post-synaptic":[138,144],"neurons,":[139,149],"or":[140],"vice":[141],"versa,":[142],"proposed":[151],"presented":[153],"here.":[154]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1}],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2025-10-10T00:00:00"}