{"id":"https://openalex.org/W4385080076","doi":"https://doi.org/10.1109/iscas46773.2023.10181759","title":"1.7pJ/SOP Neuromorphic Processor with Integrated Partial Sum Routers for In-Network Computing","display_name":"1.7pJ/SOP Neuromorphic Processor with Integrated Partial Sum Routers for In-Network Computing","publication_year":2023,"publication_date":"2023-05-21","ids":{"openalex":"https://openalex.org/W4385080076","doi":"https://doi.org/10.1109/iscas46773.2023.10181759"},"language":"en","primary_location":{"id":"doi:10.1109/iscas46773.2023.10181759","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas46773.2023.10181759","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5024806199","display_name":"Bo Wang","orcid":"https://orcid.org/0000-0002-9381-6679"},"institutions":[{"id":"https://openalex.org/I152815399","display_name":"Singapore University of Technology and Design","ror":"https://ror.org/05j6fvn87","country_code":"SG","type":"education","lineage":["https://openalex.org/I152815399"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"B. Wang","raw_affiliation_strings":["Singapore University of Technology and Design (SUTD)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Singapore University of Technology and Design (SUTD)","institution_ids":["https://openalex.org/I152815399"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021584648","display_name":"Ming Ming Wong","orcid":"https://orcid.org/0000-0002-6420-1202"},"institutions":[{"id":"https://openalex.org/I115228651","display_name":"Agency for Science, Technology and Research","ror":"https://ror.org/036wvzt09","country_code":"SG","type":"government","lineage":["https://openalex.org/I115228651"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"M. M. Wong","raw_affiliation_strings":["Institute of Microelectronics (IME), Agency for Science, Technology and Research"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics (IME), Agency for Science, Technology and Research","institution_ids":["https://openalex.org/I115228651"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029789265","display_name":"D. Li","orcid":"https://orcid.org/0000-0002-9836-3023"},"institutions":[{"id":"https://openalex.org/I115228651","display_name":"Agency for Science, Technology and Research","ror":"https://ror.org/036wvzt09","country_code":"SG","type":"government","lineage":["https://openalex.org/I115228651"]},{"id":"https://openalex.org/I152815399","display_name":"Singapore University of Technology and Design","ror":"https://ror.org/05j6fvn87","country_code":"SG","type":"education","lineage":["https://openalex.org/I152815399"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"D. Li","raw_affiliation_strings":["Singapore University of Technology and Design (SUTD)","Institute of Microelectronics (IME), Agency for Science, Technology and Research"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Singapore University of Technology and Design (SUTD)","institution_ids":["https://openalex.org/I152815399"]},{"raw_affiliation_string":"Institute of Microelectronics (IME), Agency for Science, Technology and Research","institution_ids":["https://openalex.org/I115228651"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011331709","display_name":"Yap Seng Chong","orcid":"https://orcid.org/0000-0002-7232-8473"},"institutions":[{"id":"https://openalex.org/I115228651","display_name":"Agency for Science, Technology and Research","ror":"https://ror.org/036wvzt09","country_code":"SG","type":"government","lineage":["https://openalex.org/I115228651"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Y. S. Chong","raw_affiliation_strings":["Institute of Microelectronics (IME), Agency for Science, Technology and Research"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics (IME), Agency for Science, Technology and Research","institution_ids":["https://openalex.org/I115228651"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101917143","display_name":"Jun Zhou","orcid":"https://orcid.org/0000-0001-7899-2909"},"institutions":[{"id":"https://openalex.org/I165932596","display_name":"National University of Singapore","ror":"https://ror.org/01tgyzw49","country_code":"SG","type":"education","lineage":["https://openalex.org/I165932596"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"J. Zhou","raw_affiliation_strings":["National University of Singapore (NUS),Department of Computer Science,Singapore","Department of Computer Science, National University of Singapore (NUS), Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National University of Singapore (NUS),Department of Computer Science,Singapore","institution_ids":["https://openalex.org/I165932596"]},{"raw_affiliation_string":"Department of Computer Science, National University of Singapore (NUS), Singapore","institution_ids":["https://openalex.org/I165932596"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023989495","display_name":"Weng\u2010Fai Wong","orcid":"https://orcid.org/0000-0002-4281-2053"},"institutions":[{"id":"https://openalex.org/I165932596","display_name":"National University of Singapore","ror":"https://ror.org/01tgyzw49","country_code":"SG","type":"education","lineage":["https://openalex.org/I165932596"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"W. F. Wong","raw_affiliation_strings":["National University of Singapore (NUS),Department of Computer Science,Singapore","Department of Computer Science, National University of Singapore (NUS), Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National University of Singapore (NUS),Department of Computer Science,Singapore","institution_ids":["https://openalex.org/I165932596"]},{"raw_affiliation_string":"Department of Computer Science, National University of Singapore (NUS), Singapore","institution_ids":["https://openalex.org/I165932596"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5057413185","display_name":"Li-Shiuan Peh","orcid":"https://orcid.org/0000-0001-9010-6519"},"institutions":[{"id":"https://openalex.org/I165932596","display_name":"National University of Singapore","ror":"https://ror.org/01tgyzw49","country_code":"SG","type":"education","lineage":["https://openalex.org/I165932596"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"L. Peh","raw_affiliation_strings":["National University of Singapore (NUS),Department of Computer Science,Singapore","Department of Computer Science, National University of Singapore (NUS), Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National University of Singapore (NUS),Department of Computer Science,Singapore","institution_ids":["https://openalex.org/I165932596"]},{"raw_affiliation_string":"Department of Computer Science, National University of Singapore (NUS), Singapore","institution_ids":["https://openalex.org/I165932596"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013201833","display_name":"Aarthy Mani","orcid":"https://orcid.org/0000-0002-6159-6974"},"institutions":[{"id":"https://openalex.org/I115228651","display_name":"Agency for Science, Technology and Research","ror":"https://ror.org/036wvzt09","country_code":"SG","type":"government","lineage":["https://openalex.org/I115228651"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"A. Mani","raw_affiliation_strings":["Institute of Microelectronics (IME), Agency for Science, Technology and Research"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics (IME), Agency for Science, Technology and Research","institution_ids":["https://openalex.org/I115228651"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023189641","display_name":"Manas Vijay Upadhyay","orcid":"https://orcid.org/0000-0001-6490-869X"},"institutions":[{"id":"https://openalex.org/I165932596","display_name":"National University of Singapore","ror":"https://ror.org/01tgyzw49","country_code":"SG","type":"education","lineage":["https://openalex.org/I165932596"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"M. Upadhyay","raw_affiliation_strings":["National University of Singapore (NUS),Department of Computer Science,Singapore","Department of Computer Science, National University of Singapore (NUS), Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National University of Singapore (NUS),Department of Computer Science,Singapore","institution_ids":["https://openalex.org/I165932596"]},{"raw_affiliation_string":"Department of Computer Science, National University of Singapore (NUS), Singapore","institution_ids":["https://openalex.org/I165932596"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035446348","display_name":"A. Balaji","orcid":"https://orcid.org/0000-0003-2381-5379"},"institutions":[{"id":"https://openalex.org/I165932596","display_name":"National University of Singapore","ror":"https://ror.org/01tgyzw49","country_code":"SG","type":"education","lineage":["https://openalex.org/I165932596"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"A. Balaji","raw_affiliation_strings":["National University of Singapore (NUS),Department of Computer Science,Singapore","Department of Computer Science, National University of Singapore (NUS), Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National University of Singapore (NUS),Department of Computer Science,Singapore","institution_ids":["https://openalex.org/I165932596"]},{"raw_affiliation_string":"Department of Computer Science, National University of Singapore (NUS), Singapore","institution_ids":["https://openalex.org/I165932596"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111018856","display_name":"A. T.","orcid":null},"institutions":[{"id":"https://openalex.org/I115228651","display_name":"Agency for Science, Technology and Research","ror":"https://ror.org/036wvzt09","country_code":"SG","type":"government","lineage":["https://openalex.org/I115228651"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"A. T. Do","raw_affiliation_strings":["Institute of Microelectronics (IME), Agency for Science, Technology and Research"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics (IME), Agency for Science, Technology and Research","institution_ids":["https://openalex.org/I115228651"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":11,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3681,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.5862607,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7570798397064209},{"id":"https://openalex.org/keywords/neuromorphic-engineering","display_name":"Neuromorphic engineering","score":0.7014483213424683},{"id":"https://openalex.org/keywords/clock-gating","display_name":"Clock gating","score":0.6279705762863159},{"id":"https://openalex.org/keywords/router","display_name":"Router","score":0.5708054304122925},{"id":"https://openalex.org/keywords/merge","display_name":"Merge (version control)","score":0.5265662670135498},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.49685123562812805},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4775960445404053},{"id":"https://openalex.org/keywords/lossless-compression","display_name":"Lossless compression","score":0.4428541362285614},{"id":"https://openalex.org/keywords/network-processor","display_name":"Network processor","score":0.4342958927154541},{"id":"https://openalex.org/keywords/power-gating","display_name":"Power gating","score":0.42031678557395935},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.38942205905914307},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.37350085377693176},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.33176636695861816},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.3070758879184723},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.22017833590507507},{"id":"https://openalex.org/keywords/data-compression","display_name":"Data compression","score":0.17736193537712097},{"id":"https://openalex.org/keywords/network-packet","display_name":"Network packet","score":0.137556791305542},{"id":"https://openalex.org/keywords/clock-skew","display_name":"Clock skew","score":0.13422995805740356},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12749764323234558},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.12389123439788818},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.0913129448890686}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7570798397064209},{"id":"https://openalex.org/C151927369","wikidata":"https://www.wikidata.org/wiki/Q1981312","display_name":"Neuromorphic engineering","level":3,"score":0.7014483213424683},{"id":"https://openalex.org/C22716491","wikidata":"https://www.wikidata.org/wiki/Q590170","display_name":"Clock gating","level":5,"score":0.6279705762863159},{"id":"https://openalex.org/C2775896111","wikidata":"https://www.wikidata.org/wiki/Q642560","display_name":"Router","level":2,"score":0.5708054304122925},{"id":"https://openalex.org/C197129107","wikidata":"https://www.wikidata.org/wiki/Q1921621","display_name":"Merge (version control)","level":2,"score":0.5265662670135498},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.49685123562812805},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4775960445404053},{"id":"https://openalex.org/C81081738","wikidata":"https://www.wikidata.org/wiki/Q55542","display_name":"Lossless compression","level":3,"score":0.4428541362285614},{"id":"https://openalex.org/C74366991","wikidata":"https://www.wikidata.org/wiki/Q2755335","display_name":"Network processor","level":3,"score":0.4342958927154541},{"id":"https://openalex.org/C2780700455","wikidata":"https://www.wikidata.org/wiki/Q7236515","display_name":"Power gating","level":4,"score":0.42031678557395935},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.38942205905914307},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.37350085377693176},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.33176636695861816},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.3070758879184723},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.22017833590507507},{"id":"https://openalex.org/C78548338","wikidata":"https://www.wikidata.org/wiki/Q2493","display_name":"Data compression","level":2,"score":0.17736193537712097},{"id":"https://openalex.org/C158379750","wikidata":"https://www.wikidata.org/wiki/Q214111","display_name":"Network packet","level":2,"score":0.137556791305542},{"id":"https://openalex.org/C60501442","wikidata":"https://www.wikidata.org/wiki/Q4382014","display_name":"Clock skew","level":4,"score":0.13422995805740356},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12749764323234558},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.12389123439788818},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0913129448890686},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.0},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas46773.2023.10181759","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas46773.2023.10181759","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.9100000262260437,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W2898990213","https://openalex.org/W2921131065","https://openalex.org/W3036866137","https://openalex.org/W3126444928","https://openalex.org/W3134750800","https://openalex.org/W3163401849","https://openalex.org/W3199024492","https://openalex.org/W3210048154","https://openalex.org/W4220741568","https://openalex.org/W6760647915","https://openalex.org/W6769858354","https://openalex.org/W6791634667","https://openalex.org/W6802342052","https://openalex.org/W6808981448"],"related_works":["https://openalex.org/W2546524276","https://openalex.org/W4226239708","https://openalex.org/W2152979262","https://openalex.org/W3127845477","https://openalex.org/W2005728592","https://openalex.org/W4239594101","https://openalex.org/W229101532","https://openalex.org/W2113774150","https://openalex.org/W2188626039","https://openalex.org/W2384792908"],"abstract_inverted_index":{"Conventional":[0],"neuromorphic":[1],"accelerators":[2],"primarily":[3],"leverage":[4],"split-merge":[5],"method":[6],"to":[7,20,41,56],"accommodate":[8],"a":[9,15,47],"neural":[10],"network":[11],"that":[12,52,67],"is":[13],"beyond":[14],"single":[16],"core's":[17],"size,":[18],"leading":[19],"possible":[21],"accuracy":[22],"loss,":[23],"extra":[24,61],"core":[25],"usage":[26],"and":[27,30,73,78,94],"significant":[28],"power":[29,76,83],"energy":[31,96],"overhead.":[32],"This":[33],"work":[34],"presents":[35],"an":[36,95],"energy-efficient,":[37],"reconfigurable":[38],"neuro-morphic":[39],"processor":[40],"address":[42],"the":[43,58,69,92],"problem":[44],"by":[45],"(i)":[46],"partial":[48],"sum":[49],"router":[50],"circuitry":[51],"enables":[53],"in-network":[54],"computing":[55],"remove":[57],"need":[59],"of":[60,98],"merge":[62],"cores;":[63],"(ii)":[64],"software-defined":[65],"Networks-on-Chip":[66],"eliminates":[68],"power-hungry":[70],"routing":[71],"compute":[72],"(iii)":[74],"fine-grained":[75],"gating":[77,80],"clock":[79],"technique":[81],"for":[82],"reduction.":[84],"Our":[85],"test":[86],"chip":[87],"achieves":[88],"lossless":[89],"mapping":[90],"as":[91],"algorithm":[93],"efficiency":[97],"1.7pJ/SOP":[99],"at":[100],"0.5V,":[101],"19%":[102],"lower":[103],"than":[104],"state-of-the-art":[105],"result.":[106]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
