{"id":"https://openalex.org/W4385187210","doi":"https://doi.org/10.1109/iscas46773.2023.10181681","title":"A Portable DSP Coprocessor Design Using RISC-V Packed-SIMD Instructions","display_name":"A Portable DSP Coprocessor Design Using RISC-V Packed-SIMD Instructions","publication_year":2023,"publication_date":"2023-05-21","ids":{"openalex":"https://openalex.org/W4385187210","doi":"https://doi.org/10.1109/iscas46773.2023.10181681"},"language":"en","primary_location":{"id":"doi:10.1109/iscas46773.2023.10181681","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas46773.2023.10181681","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5087911130","display_name":"Kai Li","orcid":"https://orcid.org/0000-0002-2555-5411"},"institutions":[{"id":"https://openalex.org/I162868743","display_name":"Tianjin University","ror":"https://ror.org/012tb2g32","country_code":"CN","type":"education","lineage":["https://openalex.org/I162868743"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Kai Li","raw_affiliation_strings":["School of Microelectronics, Tianjin University,Tianjin Key Laboratory of Imaging and Sensing Microelectronic Technology,Tianjin,China,300072"],"affiliations":[{"raw_affiliation_string":"School of Microelectronics, Tianjin University,Tianjin Key Laboratory of Imaging and Sensing Microelectronic Technology,Tianjin,China,300072","institution_ids":["https://openalex.org/I162868743"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102717987","display_name":"Wei Yin","orcid":"https://orcid.org/0000-0003-0432-4355"},"institutions":[{"id":"https://openalex.org/I162868743","display_name":"Tianjin University","ror":"https://ror.org/012tb2g32","country_code":"CN","type":"education","lineage":["https://openalex.org/I162868743"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Wei Yin","raw_affiliation_strings":["School of Microelectronics, Tianjin University,Tianjin Key Laboratory of Imaging and Sensing Microelectronic Technology,Tianjin,China,300072"],"affiliations":[{"raw_affiliation_string":"School of Microelectronics, Tianjin University,Tianjin Key Laboratory of Imaging and Sensing Microelectronic Technology,Tianjin,China,300072","institution_ids":["https://openalex.org/I162868743"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100409455","display_name":"Qiang Liu","orcid":"https://orcid.org/0000-0002-1269-7779"},"institutions":[{"id":"https://openalex.org/I162868743","display_name":"Tianjin University","ror":"https://ror.org/012tb2g32","country_code":"CN","type":"education","lineage":["https://openalex.org/I162868743"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Qiang Liu","raw_affiliation_strings":["School of Microelectronics, Tianjin University,Tianjin Key Laboratory of Imaging and Sensing Microelectronic Technology,Tianjin,China,300072"],"affiliations":[{"raw_affiliation_string":"School of Microelectronics, Tianjin University,Tianjin Key Laboratory of Imaging and Sensing Microelectronic Technology,Tianjin,China,300072","institution_ids":["https://openalex.org/I162868743"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5087911130"],"corresponding_institution_ids":["https://openalex.org/I162868743"],"apc_list":null,"apc_paid":null,"fwci":1.0525,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.76453942,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":100},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/coprocessor","display_name":"Coprocessor","score":0.8389211893081665},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7358739376068115},{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"Reduced instruction set computing","score":0.7310100197792053},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.6910736560821533},{"id":"https://openalex.org/keywords/simd","display_name":"SIMD","score":0.6263799667358398},{"id":"https://openalex.org/keywords/very-long-instruction-word","display_name":"Very long instruction word","score":0.5088651180267334},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.49616846442222595},{"id":"https://openalex.org/keywords/texas-instruments-davinci","display_name":"Texas Instruments DaVinci","score":0.45441094040870667},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.44666534662246704},{"id":"https://openalex.org/keywords/fast-fourier-transform","display_name":"Fast Fourier transform","score":0.43591395020484924},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3908992409706116},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.34745603799819946},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.30804550647735596},{"id":"https://openalex.org/keywords/digital-signal-processor","display_name":"Digital signal processor","score":0.2995780408382416}],"concepts":[{"id":"https://openalex.org/C86111242","wikidata":"https://www.wikidata.org/wiki/Q859595","display_name":"Coprocessor","level":2,"score":0.8389211893081665},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7358739376068115},{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.7310100197792053},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.6910736560821533},{"id":"https://openalex.org/C150552126","wikidata":"https://www.wikidata.org/wiki/Q339387","display_name":"SIMD","level":2,"score":0.6263799667358398},{"id":"https://openalex.org/C170595534","wikidata":"https://www.wikidata.org/wiki/Q249743","display_name":"Very long instruction word","level":2,"score":0.5088651180267334},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.49616846442222595},{"id":"https://openalex.org/C45549533","wikidata":"https://www.wikidata.org/wiki/Q7707766","display_name":"Texas Instruments DaVinci","level":4,"score":0.45441094040870667},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.44666534662246704},{"id":"https://openalex.org/C75172450","wikidata":"https://www.wikidata.org/wiki/Q623950","display_name":"Fast Fourier transform","level":2,"score":0.43591395020484924},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3908992409706116},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.34745603799819946},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.30804550647735596},{"id":"https://openalex.org/C161611012","wikidata":"https://www.wikidata.org/wiki/Q106370","display_name":"Digital signal processor","level":3,"score":0.2995780408382416},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas46773.2023.10181681","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas46773.2023.10181681","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7599999904632568,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[{"id":"https://openalex.org/G6803541034","display_name":null,"funder_award_id":"U21B2031","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W2030660537","https://openalex.org/W2557409653","https://openalex.org/W2770020066","https://openalex.org/W2811266402","https://openalex.org/W2963255460","https://openalex.org/W3135384844","https://openalex.org/W4285281503"],"related_works":["https://openalex.org/W2139795029","https://openalex.org/W2115688358","https://openalex.org/W1973931517","https://openalex.org/W2393747601","https://openalex.org/W1503212777","https://openalex.org/W2796337470","https://openalex.org/W2072728786","https://openalex.org/W2146636354","https://openalex.org/W2164026451","https://openalex.org/W4385187210"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,52,91],"portable":[4],"coprocessor":[5,21,48,78],"to":[6,98],"accelerate":[7],"digital":[8,72],"signal":[9],"processing":[10],"(DSP)":[11],"applications":[12],"for":[13],"low":[14],"power":[15],"Internet-of-Things":[16],"(IoT)":[17],"devices.":[18],"The":[19,46,56,88],"DSP":[20,47,77],"is":[22,49],"based":[23],"on":[24,51,75,84],"RISC-V":[25,35,81,86],"packed-SIMD":[26],"instructions,":[27],"and":[28,71,83,101],"can":[29],"be":[30],"tightly":[31],"integrated":[32,79],"with":[33,80],"various":[34],"cores":[36,82],"as":[37],"an":[38,43],"independent":[39],"IP":[40],"by":[41,96],"using":[42],"extension":[44],"interface.":[45],"verified":[50],"Nexys":[53],"A7":[54],"FPGA.":[55],"experimental":[57],"method":[58],"includes":[59],"comparing":[60],"the":[61,76],"clock":[62,93],"cycles":[63],"of":[64],"hamming":[65],"codes,":[66],"fast":[67],"Fourier":[68],"transforms":[69],"(FFT)":[70],"filters":[73],"running":[74],"original":[85],"cores.":[87],"results":[89],"demonstrate":[90],"significant":[92],"cycle":[94],"reduction":[95],"up":[97],"79.03%,":[99],"49.57%":[100],"61.58%,":[102],"respectively.":[103]},"counts_by_year":[{"year":2026,"cited_by_count":4},{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":1}],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2025-10-10T00:00:00"}
