{"id":"https://openalex.org/W3091101550","doi":"https://doi.org/10.1109/iscas45731.2020.9181157","title":"Stability and Efficiency of Explicit Integration in Interconnect Analysis on GPUs","display_name":"Stability and Efficiency of Explicit Integration in Interconnect Analysis on GPUs","publication_year":2020,"publication_date":"2020-09-29","ids":{"openalex":"https://openalex.org/W3091101550","doi":"https://doi.org/10.1109/iscas45731.2020.9181157","mag":"3091101550"},"language":"en","primary_location":{"id":"doi:10.1109/iscas45731.2020.9181157","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas45731.2020.9181157","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://hdl.handle.net/10317/10370","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5072325815","display_name":"Gin\u00e9s Dom\u00e9nech\u2010Asensi","orcid":"https://orcid.org/0000-0002-2419-9275"},"institutions":[{"id":"https://openalex.org/I3123212020","display_name":"Universidad Polit\u00e9cnica de Cartagena","ror":"https://ror.org/02k5kx966","country_code":"ES","type":"education","lineage":["https://openalex.org/I3123212020"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Gin\u00e9s Dom\u00e9nech-Asensi","raw_affiliation_strings":["Dpto. de Elect&#x00F3;nica, Tecnolog&#x00ED;a de Computadoras y Proyectos, Universidad Politecnica de Cartagena, Cartagena, (Murcia), Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dpto. de Elect&#x00F3;nica, Tecnolog&#x00ED;a de Computadoras y Proyectos, Universidad Politecnica de Cartagena, Cartagena, (Murcia), Spain","institution_ids":["https://openalex.org/I3123212020"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5040523899","display_name":"Tom J. K\u00e1zmierski","orcid":null},"institutions":[{"id":"https://openalex.org/I43439940","display_name":"University of Southampton","ror":"https://ror.org/01ryk1543","country_code":"GB","type":"education","lineage":["https://openalex.org/I43439940"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Tom J. Kazmierski","raw_affiliation_strings":["Dpt. of Electronics and Computers Science, University of Southampton, Southampton, Hampshire, United kingdom"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dpt. of Electronics and Computers Science, University of Southampton, Southampton, Hampshire, United kingdom","institution_ids":["https://openalex.org/I43439940"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3578,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.46996794,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.7589221000671387},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.7485636472702026},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7097811698913574},{"id":"https://openalex.org/keywords/solver","display_name":"Solver","score":0.6216972470283508},{"id":"https://openalex.org/keywords/stability","display_name":"Stability (learning theory)","score":0.59101802110672},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5701583623886108},{"id":"https://openalex.org/keywords/variable","display_name":"Variable (mathematics)","score":0.49884796142578125},{"id":"https://openalex.org/keywords/computational-science","display_name":"Computational science","score":0.3446340560913086},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.22902324795722961},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.146834135055542},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.0757022500038147}],"concepts":[{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.7589221000671387},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.7485636472702026},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7097811698913574},{"id":"https://openalex.org/C2778770139","wikidata":"https://www.wikidata.org/wiki/Q1966904","display_name":"Solver","level":2,"score":0.6216972470283508},{"id":"https://openalex.org/C112972136","wikidata":"https://www.wikidata.org/wiki/Q7595718","display_name":"Stability (learning theory)","level":2,"score":0.59101802110672},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5701583623886108},{"id":"https://openalex.org/C182365436","wikidata":"https://www.wikidata.org/wiki/Q50701","display_name":"Variable (mathematics)","level":2,"score":0.49884796142578125},{"id":"https://openalex.org/C459310","wikidata":"https://www.wikidata.org/wiki/Q117801","display_name":"Computational science","level":1,"score":0.3446340560913086},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.22902324795722961},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.146834135055542},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0757022500038147},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/iscas45731.2020.9181157","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas45731.2020.9181157","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},{"id":"pmh:oai:repositorio.upct.es:10317/10370","is_oa":true,"landing_page_url":"http://hdl.handle.net/10317/10370","pdf_url":null,"source":{"id":"https://openalex.org/S4306401372","display_name":"Digital Repository (Polytechnic University of Cartagena)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I3123212020","host_organization_name":"Universidad Polit\u00e9cnica de Cartagena","host_organization_lineage":["https://openalex.org/I3123212020"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":{"id":"pmh:oai:repositorio.upct.es:10317/10370","is_oa":true,"landing_page_url":"http://hdl.handle.net/10317/10370","pdf_url":null,"source":{"id":"https://openalex.org/S4306401372","display_name":"Digital Repository (Polytechnic University of Cartagena)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I3123212020","host_organization_name":"Universidad Polit\u00e9cnica de Cartagena","host_organization_lineage":["https://openalex.org/I3123212020"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1506068831","https://openalex.org/W1986473022","https://openalex.org/W1998894100","https://openalex.org/W2003105834","https://openalex.org/W2007890530","https://openalex.org/W2023354763","https://openalex.org/W2118076222","https://openalex.org/W2132450860","https://openalex.org/W2167078995","https://openalex.org/W2511040012","https://openalex.org/W2538739635","https://openalex.org/W2594491068","https://openalex.org/W2887698420","https://openalex.org/W2942804803","https://openalex.org/W3145363696","https://openalex.org/W3147150317"],"related_works":["https://openalex.org/W2081032080","https://openalex.org/W2134733504","https://openalex.org/W2144460576","https://openalex.org/W1604758548","https://openalex.org/W4367553810","https://openalex.org/W2104142636","https://openalex.org/W1549048322","https://openalex.org/W2804126825","https://openalex.org/W2011940952","https://openalex.org/W2731831065"],"abstract_inverted_index":{"This":[0],"paper":[1,45],"presents":[2],"a":[3,18,57,111],"new":[4],"high-performance":[5],"technique":[6,23,58],"to":[7,59,75,88,106],"parallelise":[8],"numeric":[9],"integration":[10,35,61,72,114],"of":[11,29,49,77,128,136],"large":[12,139],"VLSI":[13,99],"interconnect":[14,65,100],"analog":[15],"models":[16],"on":[17,26,38,117],"general":[19],"purpose":[20],"GPU.":[21],"The":[22,44,91,122],"is":[24,94,142],"based":[25,37],"the":[27,39,47,50,78,84,118,126,129,145],"combination":[28],"space-state":[30],"formulation":[31],"with":[32,144],"an":[33,97],"explicit":[34,53,68,131],"method":[36,54],"Adams-Bashforth":[40],"second":[41],"order":[42,135],"formula.":[43],"studies":[46],"stability":[48,62],"variable":[51],"step":[52],"and":[55,102,141],"proposes":[56],"guarantee":[60],"specifically":[63],"for":[64,138],"systems.":[66],"Although":[67],"methods":[69],"require":[70],"smaller":[71],"steps":[73],"compared":[74,105],"those":[76,107],"traditional":[79],"implicit":[80,89,113],"techniques,":[81],"they":[82],"avoid":[83],"complex":[85],"calculations":[86],"inherent":[87],"integration.":[90],"proposed":[92],"approach":[93],"demonstrated":[95],"using":[96],"RC":[98],"model":[101],"results":[103,123],"are":[104],"achieved":[108],"by":[109],"Ngspice,":[110],"state-of-the-art":[112],"solver,":[115],"implemented":[116],"same":[119],"parallel":[120],"hardware.":[121],"show":[124],"that":[125],"speed-up":[127],"parallelised":[130],"solution":[132],"reaches":[133],"one":[134],"magnitude":[137],"systems":[140],"increasing":[143],"circuit":[146],"size.":[147]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
