{"id":"https://openalex.org/W3089661896","doi":"https://doi.org/10.1109/iscas45731.2020.9181006","title":"Adaptive Pulse Program Scheme to Improve the Vth Distribution for 3D NAND Flash","display_name":"Adaptive Pulse Program Scheme to Improve the Vth Distribution for 3D NAND Flash","publication_year":2020,"publication_date":"2020-09-29","ids":{"openalex":"https://openalex.org/W3089661896","doi":"https://doi.org/10.1109/iscas45731.2020.9181006","mag":"3089661896"},"language":"en","primary_location":{"id":"doi:10.1109/iscas45731.2020.9181006","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas45731.2020.9181006","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100415969","display_name":"Shuang Li","orcid":"https://orcid.org/0000-0003-3929-2752"},"institutions":[{"id":"https://openalex.org/I4210165038","display_name":"University of Chinese Academy of Sciences","ror":"https://ror.org/05qbk4x57","country_code":"CN","type":"education","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210165038"]},{"id":"https://openalex.org/I177739611","display_name":"Yangtze University","ror":"https://ror.org/05bhmhz54","country_code":"CN","type":"education","lineage":["https://openalex.org/I177739611"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Shuang Li","raw_affiliation_strings":["Institute of Microelectronics of The Chinese Academy of Sciences, Beijing, China; University of Chinese Academy of Sciences, Beijing, China; Yangtze Memory Technologies Co., Ltd, Wuhan, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics of The Chinese Academy of Sciences, Beijing, China; University of Chinese Academy of Sciences, Beijing, China; Yangtze Memory Technologies Co., Ltd, Wuhan, China","institution_ids":["https://openalex.org/I177739611","https://openalex.org/I4210165038","https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103213925","display_name":"Zhichao Du","orcid":"https://orcid.org/0000-0003-4390-0343"},"institutions":[{"id":"https://openalex.org/I4210165038","display_name":"University of Chinese Academy of Sciences","ror":"https://ror.org/05qbk4x57","country_code":"CN","type":"education","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210165038"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhichao Du","raw_affiliation_strings":["Institute of Microelectronics of The Chinese Academy of Sciences, Beijing, China; University of Chinese Academy of Sciences, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics of The Chinese Academy of Sciences, Beijing, China; University of Chinese Academy of Sciences, Beijing, China","institution_ids":["https://openalex.org/I4210165038","https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100445061","display_name":"Yu Wang","orcid":"https://orcid.org/0000-0001-6108-5157"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Yu Wang","raw_affiliation_strings":["Yangtze Memory Technologies Co., Ltd, Wuhan, China","Yangtze Memory Technologies Co., Ltd., Wuhan, China"],"affiliations":[{"raw_affiliation_string":"Yangtze Memory Technologies Co., Ltd, Wuhan, China","institution_ids":[]},{"raw_affiliation_string":"Yangtze Memory Technologies Co., Ltd., Wuhan, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100394591","display_name":"Fei Liu","orcid":"https://orcid.org/0000-0001-9533-3446"},"institutions":[{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"funder","lineage":["https://openalex.org/I19820366"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Fei Liu","raw_affiliation_strings":["Institute of Microelectronics of The Chinese Academy of Sciences, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics of The Chinese Academy of Sciences, Beijing, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033530190","display_name":"Qi Wang","orcid":"https://orcid.org/0000-0002-7552-1527"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"funder","lineage":["https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Qi Wang","raw_affiliation_strings":["Institute of Microelectronics of The Chinese Academy of Sciences, Beijing, China; Yangtze Memory Technologies Co., Ltd, Wuhan, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics of The Chinese Academy of Sciences, Beijing, China; Yangtze Memory Technologies Co., Ltd, Wuhan, China","institution_ids":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5044308493","display_name":"Zongliang Huo","orcid":"https://orcid.org/0000-0002-9845-5649"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"funder","lineage":["https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zongliang Huo","raw_affiliation_strings":["Institute of Microelectronics of The Chinese Academy of Sciences, Beijing, China; Yangtze Memory Technologies Co., Ltd, Wuhan, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics of The Chinese Academy of Sciences, Beijing, China; Yangtze Memory Technologies Co., Ltd, Wuhan, China","institution_ids":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5100415969"],"corresponding_institution_ids":["https://openalex.org/I177739611","https://openalex.org/I4210119392","https://openalex.org/I4210165038"],"apc_list":null,"apc_paid":null,"fwci":0.3083,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.61408957,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":96},"biblio":{"volume":"30","issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12162","display_name":"Cellular Automata and Applications","score":0.9871000051498413,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9829999804496765,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/nand-gate","display_name":"NAND gate","score":0.8338500261306763},{"id":"https://openalex.org/keywords/flash","display_name":"Flash (photography)","score":0.7640520334243774},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6782532930374146},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.6667517423629761},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5472729206085205},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.47265851497650146},{"id":"https://openalex.org/keywords/pulse","display_name":"Pulse (music)","score":0.45459842681884766},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.37005800008773804},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.31059902906417847},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15937688946723938},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.15576481819152832},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.146854430437088},{"id":"https://openalex.org/keywords/optics","display_name":"Optics","score":0.12484043836593628},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.10587882995605469},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10521438717842102}],"concepts":[{"id":"https://openalex.org/C124296912","wikidata":"https://www.wikidata.org/wiki/Q575178","display_name":"NAND gate","level":3,"score":0.8338500261306763},{"id":"https://openalex.org/C2777526259","wikidata":"https://www.wikidata.org/wiki/Q221836","display_name":"Flash (photography)","level":2,"score":0.7640520334243774},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6782532930374146},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.6667517423629761},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5472729206085205},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.47265851497650146},{"id":"https://openalex.org/C2780167933","wikidata":"https://www.wikidata.org/wiki/Q1550652","display_name":"Pulse (music)","level":3,"score":0.45459842681884766},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.37005800008773804},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.31059902906417847},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15937688946723938},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.15576481819152832},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.146854430437088},{"id":"https://openalex.org/C120665830","wikidata":"https://www.wikidata.org/wiki/Q14620","display_name":"Optics","level":1,"score":0.12484043836593628},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.10587882995605469},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10521438717842102},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas45731.2020.9181006","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas45731.2020.9181006","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.46000000834465027}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W2114512042","https://openalex.org/W2135210684","https://openalex.org/W2523127280","https://openalex.org/W4238941685"],"related_works":["https://openalex.org/W2054139911","https://openalex.org/W1577524679","https://openalex.org/W2369836424","https://openalex.org/W2162027152","https://openalex.org/W4230869547","https://openalex.org/W2489439822","https://openalex.org/W3165307257","https://openalex.org/W2515312339","https://openalex.org/W2145098804","https://openalex.org/W4237143391"],"abstract_inverted_index":{"As":[0],"the":[1,37,60,70,105],"demand":[2],"of":[3,72,95],"multi-bit/cell":[4],"NAND":[5,112],"flash":[6,113],"devices":[7],"is":[8,32,102],"increasing":[9],"rapidly,":[10],"getting":[11],"a":[12],"narrow":[13],"cell":[14,89],"Vth":[15,38,73,90],"distribution":[16,39,91],"becomes":[17],"more":[18],"challenging":[19],"and":[20,98],"necessary.":[21],"To":[22],"overcome":[23],"this":[24,41,52],"challenge,":[25],"an":[26],"adaptive":[27,56],"pulse":[28,48,58],"program":[29,49,57,64],"(APP)":[30],"scheme":[31,54,83,97,101],"reported":[33],"that":[34,81],"can":[35],"tighten":[36],"in":[40],"work.":[42],"Compared":[43],"with":[44,62],"conventional":[45],"incremental":[46],"step":[47],"(ISPP)":[50],"scheme,":[51],"proposed":[53],"uses":[55],"to":[59,68],"cells":[61],"different":[63],"speed,":[65],"which":[66],"targets":[67],"prevent":[69],"extension":[71],"distribution's":[74],"upper":[75],"tail.":[76],"Our":[77],"experimental":[78],"result":[79],"demonstrates":[80],"APP":[82,96],"achieves":[84],"~15%":[85],"improvement":[86],"for":[87],"reducing":[88],"width.":[92],"This":[93],"comparison":[94],"general":[99],"ISPP":[100],"performed":[103],"by":[104],"FPGA":[106],"platform":[107],"using":[108],"64-layer":[109],"3D":[110],"charge-trapping":[111],"chip.":[114]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2022,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
