{"id":"https://openalex.org/W3090091760","doi":"https://doi.org/10.1109/iscas45731.2020.9180999","title":"Gain-Cell Embedded DRAMs: Modeling and Design Space","display_name":"Gain-Cell Embedded DRAMs: Modeling and Design Space","publication_year":2020,"publication_date":"2020-09-29","ids":{"openalex":"https://openalex.org/W3090091760","doi":"https://doi.org/10.1109/iscas45731.2020.9180999","mag":"3090091760"},"language":"en","primary_location":{"id":"doi:10.1109/iscas45731.2020.9180999","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas45731.2020.9180999","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://infoscience.epfl.ch/record/290099","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5078908633","display_name":"Andrea Bonetti","orcid":"https://orcid.org/0000-0002-0135-5095"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":true,"raw_author_name":"Andrea Bonetti","raw_affiliation_strings":["École Polytechnique Fédérale de Lausanne (EPFL), Switzerland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"École Polytechnique Fédérale de Lausanne (EPFL), Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030091052","display_name":"Roman Golman","orcid":"https://orcid.org/0000-0002-1215-5603"},"institutions":[{"id":"https://openalex.org/I13955877","display_name":"Bar-Ilan University","ror":"https://ror.org/03kgsv495","country_code":"IL","type":"education","lineage":["https://openalex.org/I13955877"]}],"countries":["IL"],"is_corresponding":false,"raw_author_name":"Roman Golman","raw_affiliation_strings":["Bar-Ilan University, Israel","Bar-Ilan University, Ramat Gan, Israel"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Bar-Ilan University, Israel","institution_ids":["https://openalex.org/I13955877"]},{"raw_affiliation_string":"Bar-Ilan University, Ramat Gan, Israel","institution_ids":["https://openalex.org/I13955877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034618529","display_name":"Robert Giterman","orcid":"https://orcid.org/0000-0002-1410-4746"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Robert Giterman","raw_affiliation_strings":["École Polytechnique Fédérale de Lausanne (EPFL), Switzerland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"École Polytechnique Fédérale de Lausanne (EPFL), Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026444183","display_name":"Adam Teman","orcid":"https://orcid.org/0000-0002-8233-4711"},"institutions":[{"id":"https://openalex.org/I13955877","display_name":"Bar-Ilan University","ror":"https://ror.org/03kgsv495","country_code":"IL","type":"education","lineage":["https://openalex.org/I13955877"]}],"countries":["IL"],"is_corresponding":false,"raw_author_name":"Adam Teman","raw_affiliation_strings":["Bar-Ilan University, Israel","Bar-Ilan University, Ramat Gan, Israel"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Bar-Ilan University, Israel","institution_ids":["https://openalex.org/I13955877"]},{"raw_affiliation_string":"Bar-Ilan University, Ramat Gan, Israel","institution_ids":["https://openalex.org/I13955877"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5059133771","display_name":"Andreas Burg","orcid":"https://orcid.org/0000-0002-7270-5558"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Andreas Burg","raw_affiliation_strings":["École Polytechnique Fédérale de Lausanne (EPFL), Switzerland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"École Polytechnique Fédérale de Lausanne (EPFL), Switzerland","institution_ids":["https://openalex.org/I5124864"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5078908633"],"corresponding_institution_ids":["https://openalex.org/I5124864"],"apc_list":null,"apc_paid":null,"fwci":0.104,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.43857226,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"1"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.7005661725997925},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5647943615913391},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5624769330024719},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.5482235550880432},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.49250850081443787},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.4761124551296234},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4608971178531647},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.37844765186309814},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21135082840919495},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.199021577835083},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.18509942293167114},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.13689422607421875}],"concepts":[{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.7005661725997925},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5647943615913391},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5624769330024719},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.5482235550880432},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.49250850081443787},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.4761124551296234},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4608971178531647},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.37844765186309814},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21135082840919495},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.199021577835083},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.18509942293167114},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.13689422607421875},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/iscas45731.2020.9180999","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas45731.2020.9180999","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},{"id":"pmh:oai:infoscience.epfl.ch:290099","is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/290099","pdf_url":null,"source":{"id":"https://openalex.org/S4306400487","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"WoS","raw_type":"conference proceedings"}],"best_oa_location":{"id":"pmh:oai:infoscience.epfl.ch:290099","is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/290099","pdf_url":null,"source":{"id":"https://openalex.org/S4306400487","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"WoS","raw_type":"conference proceedings"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W3120961607","https://openalex.org/W4401568740","https://openalex.org/W2098207691","https://openalex.org/W3148568549","https://openalex.org/W1648516568","https://openalex.org/W361036515","https://openalex.org/W4392590355","https://openalex.org/W2269474412","https://openalex.org/W4386903460","https://openalex.org/W1518256384"],"abstract_inverted_index":{"Among":[0],"the":[1,53,62,65,71,80,103,122,150,164,167,174,202,229,240,250],"different":[2,196],"types":[3],"of":[4,55,64,67,83,97,105,114,134,152,158,166,173,185,207,228,245],"DRAMs,":[5],"gain-cell":[6],"embedded":[7],"DRAM":[8],"(GC-eDRAM)":[9],"is":[10,179,216,236],"a":[11,29,111,182,191,208,219],"compact,":[12],"low-power":[13],"and":[14,42,132,144,147,199],"CMOS-compatible":[15],"alternative":[16],"to":[17,87,141,171,238],"conventional":[18],"SRAM.":[19],"GC-eDRAM":[20,209],"achieves":[21],"high":[22],"memory":[23,129,145,197],"density":[24],"as":[25,37,39,77,79,155,157,163],"it":[26,148],"relies":[27,57],"on":[28,58,249],"storage":[30],"cell":[31],"that":[32,43,126],"can":[33,44],"be":[34,45,88],"implemented":[35],"with":[36,181,218],"few":[38],"two":[40],"transistors":[41],"fabricated":[46,210],"without":[47],"additional":[48],"process":[49,215,226],"steps.":[50],"However,":[51],"since":[52],"performance":[54,66],"GC-eDRAMs":[56,246],"many":[59],"interdependent":[60],"variables,":[61],"optimization":[63,244],"these":[68],"memories":[69,98],"for":[70,102,195],"integration":[72],"into":[73],"their":[74],"hosting":[75],"system,":[76],"well":[78,156],"design":[81,108,243,253],"investigation":[82],"future":[84],"GC-eDRAMs,":[85],"prove":[86],"highly":[89],"complex":[90],"tasks.":[91],"In":[92,116],"this":[93,106,117],"context,":[94],"modeling":[95,124,234],"tools":[96],"are":[99,255],"key":[100],"enablers":[101],"exploration":[104],"large":[107],"space":[109],"in":[110,190,211,242],"short":[112],"amount":[113],"time.":[115],"paper,":[118],"we":[119],"present":[120],"GEMTOO,":[121],"first":[123],"tool":[125,137,235],"estimates":[127],"timing,":[128],"availability,":[130],"bandwidth,":[131],"area":[133],"GC-eDRAMs.":[135],"The":[136,177,231],"considers":[138],"parameters":[139],"related":[140],"technology,":[142],"circuits,":[143],"architecture":[146],"enables":[149],"evaluation":[151],"architectural":[153],"transformations":[154],"advanced":[159],"transistor-level":[160],"effects,":[161],"such":[162],"increase":[165],"access":[168],"delay":[169],"due":[170],"deterioration":[172],"stored":[175],"data.":[176],"timing":[178],"estimated":[180,217],"maximum":[183],"deviation":[184,221],"15%":[186],"from":[187],"post-layout":[188],"simulations":[189],"28nm":[192,212],"FD-SOI":[193],"technology":[194],"sizes":[198],"architectures.":[200],"Moreover,":[201],"measured":[203],"random":[204,225],"cycle":[205],"frequency":[206],"CMOS":[213],"bulk":[214],"9%":[220],"when":[222],"considering":[223],"6-sigma":[224],"variations":[227],"bitcells.":[230],"proposed":[232],"GEMTOO":[233],"used":[237],"show":[239],"intricacies":[241],"and,":[247],"based":[248],"results,":[251],"optimal":[252],"practices":[254],"derived.":[256]},"counts_by_year":[{"year":2023,"cited_by_count":1}],"updated_date":"2026-05-03T08:25:01.440150","created_date":"2025-10-10T00:00:00"}