{"id":"https://openalex.org/W3091279293","doi":"https://doi.org/10.1109/iscas45731.2020.9180743","title":"Exact In-Memory Multiplication Based on Deterministic Stochastic Computing","display_name":"Exact In-Memory Multiplication Based on Deterministic Stochastic Computing","publication_year":2020,"publication_date":"2020-09-29","ids":{"openalex":"https://openalex.org/W3091279293","doi":"https://doi.org/10.1109/iscas45731.2020.9180743","mag":"3091279293"},"language":"en","primary_location":{"id":"doi:10.1109/iscas45731.2020.9180743","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas45731.2020.9180743","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5011531686","display_name":"Mohsen Riahi Alam","orcid":"https://orcid.org/0000-0003-3892-8296"},"institutions":[{"id":"https://openalex.org/I79516672","display_name":"University of Louisiana at Lafayette","ror":"https://ror.org/01x8rc503","country_code":"US","type":"education","lineage":["https://openalex.org/I2799628689","https://openalex.org/I79516672"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mohsen Riahi Alam","raw_affiliation_strings":["University of Louisiana at Lafayette, Louisiana, USA","University of Louisiana at Lafayette, Lafayette, LA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Louisiana at Lafayette, Louisiana, USA","institution_ids":["https://openalex.org/I79516672"]},{"raw_affiliation_string":"University of Louisiana at Lafayette, Lafayette, LA, USA","institution_ids":["https://openalex.org/I79516672"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012903661","display_name":"M. Hassan Najafi","orcid":"https://orcid.org/0000-0002-4655-6229"},"institutions":[{"id":"https://openalex.org/I79516672","display_name":"University of Louisiana at Lafayette","ror":"https://ror.org/01x8rc503","country_code":"US","type":"education","lineage":["https://openalex.org/I2799628689","https://openalex.org/I79516672"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M. Hassan Najafi","raw_affiliation_strings":["University of Louisiana at Lafayette, Louisiana, USA","University of Louisiana at Lafayette, Lafayette, LA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Louisiana at Lafayette, Louisiana, USA","institution_ids":["https://openalex.org/I79516672"]},{"raw_affiliation_string":"University of Louisiana at Lafayette, Lafayette, LA, USA","institution_ids":["https://openalex.org/I79516672"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5050080301","display_name":"Nima TaheriNejad","orcid":"https://orcid.org/0000-0002-1295-0332"},"institutions":[{"id":"https://openalex.org/I145847075","display_name":"TU Wien","ror":"https://ror.org/04d836q62","country_code":"AT","type":"education","lineage":["https://openalex.org/I145847075"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Nima TaheriNejad","raw_affiliation_strings":["Technische Universität Wien, Vienna, Austria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Technische Universität Wien, Vienna, Austria","institution_ids":["https://openalex.org/I145847075"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10581","display_name":"Neural dynamics and brain function","score":0.9929999709129333,"subfield":{"id":"https://openalex.org/subfields/2805","display_name":"Cognitive Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8209577798843384},{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.6686554551124573},{"id":"https://openalex.org/keywords/in-memory-processing","display_name":"In-Memory Processing","score":0.6102182269096375},{"id":"https://openalex.org/keywords/conventional-memory","display_name":"Conventional memory","score":0.5235152840614319},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4941006004810333},{"id":"https://openalex.org/keywords/flat-memory-model","display_name":"Flat memory model","score":0.46058860421180725},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.45859092473983765},{"id":"https://openalex.org/keywords/computing-with-memory","display_name":"Computing with Memory","score":0.4295894503593445},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.42363429069519043},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.4115653336048126},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.31552648544311523},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.14112159609794617}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8209577798843384},{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.6686554551124573},{"id":"https://openalex.org/C123593499","wikidata":"https://www.wikidata.org/wiki/Q6008583","display_name":"In-Memory Processing","level":5,"score":0.6102182269096375},{"id":"https://openalex.org/C53838383","wikidata":"https://www.wikidata.org/wiki/Q541148","display_name":"Conventional memory","level":5,"score":0.5235152840614319},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4941006004810333},{"id":"https://openalex.org/C57863822","wikidata":"https://www.wikidata.org/wiki/Q905488","display_name":"Flat memory model","level":4,"score":0.46058860421180725},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.45859092473983765},{"id":"https://openalex.org/C152890283","wikidata":"https://www.wikidata.org/wiki/Q4129922","display_name":"Computing with Memory","level":5,"score":0.4295894503593445},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.42363429069519043},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.4115653336048126},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.31552648544311523},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.14112159609794617},{"id":"https://openalex.org/C97854310","wikidata":"https://www.wikidata.org/wiki/Q19541","display_name":"Search engine","level":2,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C164120249","wikidata":"https://www.wikidata.org/wiki/Q995982","display_name":"Web search query","level":3,"score":0.0},{"id":"https://openalex.org/C194222762","wikidata":"https://www.wikidata.org/wiki/Q114486","display_name":"Query by Example","level":4,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C23123220","wikidata":"https://www.wikidata.org/wiki/Q816826","display_name":"Information retrieval","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas45731.2020.9180743","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas45731.2020.9180743","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.9100000262260437}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W1578783943","https://openalex.org/W2003056114","https://openalex.org/W2018774711","https://openalex.org/W2025674646","https://openalex.org/W2081729575","https://openalex.org/W2098470668","https://openalex.org/W2101765144","https://openalex.org/W2122148191","https://openalex.org/W2129868601","https://openalex.org/W2162651880","https://openalex.org/W2170029535","https://openalex.org/W2245204474","https://openalex.org/W2407339173","https://openalex.org/W2533474659","https://openalex.org/W2579041139","https://openalex.org/W2625133503","https://openalex.org/W2664249309","https://openalex.org/W2751874059","https://openalex.org/W2778935320","https://openalex.org/W2799942529","https://openalex.org/W2900009113","https://openalex.org/W2915308240","https://openalex.org/W2967456992","https://openalex.org/W2972614379","https://openalex.org/W2990351842","https://openalex.org/W3001855497","https://openalex.org/W3002848853"],"related_works":["https://openalex.org/W3180803030","https://openalex.org/W1575240748","https://openalex.org/W2024155916","https://openalex.org/W2993507867","https://openalex.org/W3025845664","https://openalex.org/W4248614727","https://openalex.org/W2296275612","https://openalex.org/W3200363193","https://openalex.org/W198932933","https://openalex.org/W4365205197"],"abstract_inverted_index":{"Memristors":[0],"offer":[1],"the":[2,13,69,75,102,111,115,123],"ability":[3],"to":[4,68,90,122],"both":[5],"store":[6],"and":[7,20,50,89,113,118,129],"process":[8],"data":[9,16,54],"in":[10],"memory,":[11],"eliminating":[12],"overhead":[14],"of":[15,42,53,62,71,101,105],"transfer":[17],"between":[18],"memory":[19,116],"processing":[21],"unit.":[22],"For":[23,81],"data-intensive":[24],"applications,":[25],"developing":[26],"efficient":[27,51],"in-memory":[28,58,79,127],"computing":[29,35],"methods":[30,59],"is":[31],"under":[32],"investigation.":[33],"Stochastic":[34],"(SC),":[36],"a":[37,95],"paradigm":[38],"offering":[39],"simple":[40],"execution":[41],"complex":[43],"operations,":[44,83],"has":[45],"been":[46],"used":[47],"for":[48],"reliable":[49],"multiplication":[52],"in-memory.":[55],"Current":[56],"SC-based":[57,78],"are":[60],"incapable":[61],"producing":[63],"accurate":[64,77,126],"results.":[65],"This":[66],"work,":[67],"best":[70],"our":[72],"knowledge,":[73],"develops":[74],"first":[76],"multiplier.":[80],"logical":[82],"we":[84,93],"use":[85],"Memristor-Aided":[86],"Logic":[87],"(MAGIC),":[88],"generate":[91],"bit-streams,":[92],"propose":[94],"novel":[96],"method,":[97],"which":[98],"takes":[99],"advantage":[100],"intrinsic":[103],"properties":[104],"memristors.":[106],"The":[107],"proposed":[108],"design":[109],"improves":[110],"speed":[112],"reduces":[114],"usage":[117],"energy":[119],"consumption":[120],"compared":[121],"State-of-the-Art":[124],"(SoA)":[125],"fixed-point":[128],"off-memory":[130],"SC":[131],"multipliers.":[132]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":4}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}