{"id":"https://openalex.org/W3090688463","doi":"https://doi.org/10.1109/iscas45731.2020.9180629","title":"Scalable Block-Based Spiking Neural Network Hardware with a Multiplierless Neuron Model","display_name":"Scalable Block-Based Spiking Neural Network Hardware with a Multiplierless Neuron Model","publication_year":2020,"publication_date":"2020-09-29","ids":{"openalex":"https://openalex.org/W3090688463","doi":"https://doi.org/10.1109/iscas45731.2020.9180629","mag":"3090688463"},"language":"en","primary_location":{"id":"doi:10.1109/iscas45731.2020.9180629","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas45731.2020.9180629","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5036682724","display_name":"Vishnu P. Nambiar","orcid":"https://orcid.org/0000-0001-5570-5911"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]},{"id":"https://openalex.org/I4210090209","display_name":"Institute of Microelectronics","ror":"https://ror.org/009rw8n36","country_code":"SG","type":"facility","lineage":["https://openalex.org/I115228651","https://openalex.org/I4210090209","https://openalex.org/I91275662"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Vishnu P. Nambiar","raw_affiliation_strings":["IC-Design Department, Institute of Microelectronics (IME), A∗STAR, Singapore; School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IC-Design Department, Institute of Microelectronics (IME), A∗STAR, Singapore; School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I4210090209","https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037605734","display_name":"E. K. Koh","orcid":null},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]},{"id":"https://openalex.org/I4210090209","display_name":"Institute of Microelectronics","ror":"https://ror.org/009rw8n36","country_code":"SG","type":"facility","lineage":["https://openalex.org/I115228651","https://openalex.org/I4210090209","https://openalex.org/I91275662"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Eng Kiat Koh","raw_affiliation_strings":["IC-Design Department, Institute of Microelectronics (IME), A∗STAR, Singapore; School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IC-Design Department, Institute of Microelectronics (IME), A∗STAR, Singapore; School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I4210090209","https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032368049","display_name":"Junran Pu","orcid":"https://orcid.org/0000-0002-7434-8582"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]},{"id":"https://openalex.org/I4210090209","display_name":"Institute of Microelectronics","ror":"https://ror.org/009rw8n36","country_code":"SG","type":"facility","lineage":["https://openalex.org/I115228651","https://openalex.org/I4210090209","https://openalex.org/I91275662"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Junran Pu","raw_affiliation_strings":["IC-Design Department, Institute of Microelectronics (IME), A∗STAR, Singapore; School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IC-Design Department, Institute of Microelectronics (IME), A∗STAR, Singapore; School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I4210090209","https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013201833","display_name":"Aarthy Mani","orcid":"https://orcid.org/0000-0002-6159-6974"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]},{"id":"https://openalex.org/I4210090209","display_name":"Institute of Microelectronics","ror":"https://ror.org/009rw8n36","country_code":"SG","type":"facility","lineage":["https://openalex.org/I115228651","https://openalex.org/I4210090209","https://openalex.org/I91275662"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Aarthy Mani","raw_affiliation_strings":["IC-Design Department, Institute of Microelectronics (IME), A∗STAR, Singapore; School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IC-Design Department, Institute of Microelectronics (IME), A∗STAR, Singapore; School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I4210090209","https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066081595","display_name":"Wong Ming Ming","orcid":null},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]},{"id":"https://openalex.org/I4210090209","display_name":"Institute of Microelectronics","ror":"https://ror.org/009rw8n36","country_code":"SG","type":"facility","lineage":["https://openalex.org/I115228651","https://openalex.org/I4210090209","https://openalex.org/I91275662"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Wong Ming Ming","raw_affiliation_strings":["IC-Design Department, Institute of Microelectronics (IME), A∗STAR, Singapore; School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IC-Design Department, Institute of Microelectronics (IME), A∗STAR, Singapore; School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I4210090209","https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100740274","display_name":"Li Fei","orcid":"https://orcid.org/0000-0002-5990-8078"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]},{"id":"https://openalex.org/I4210090209","display_name":"Institute of Microelectronics","ror":"https://ror.org/009rw8n36","country_code":"SG","type":"facility","lineage":["https://openalex.org/I115228651","https://openalex.org/I4210090209","https://openalex.org/I91275662"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Li Fei","raw_affiliation_strings":["IC-Design Department, Institute of Microelectronics (IME), A∗STAR, Singapore; School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IC-Design Department, Institute of Microelectronics (IME), A∗STAR, Singapore; School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I4210090209","https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5042682339","display_name":"Wang Ling Goh","orcid":"https://orcid.org/0000-0001-7466-8941"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]},{"id":"https://openalex.org/I4210090209","display_name":"Institute of Microelectronics","ror":"https://ror.org/009rw8n36","country_code":"SG","type":"facility","lineage":["https://openalex.org/I115228651","https://openalex.org/I4210090209","https://openalex.org/I91275662"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Wang Ling Goh","raw_affiliation_strings":["IC-Design Department, Institute of Microelectronics (IME), A∗STAR, Singapore; School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IC-Design Department, Institute of Microelectronics (IME), A∗STAR, Singapore; School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I4210090209","https://openalex.org/I172675005"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101615706","display_name":"Anh Tuan","orcid":"https://orcid.org/0000-0002-8320-6818"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]},{"id":"https://openalex.org/I4210090209","display_name":"Institute of Microelectronics","ror":"https://ror.org/009rw8n36","country_code":"SG","type":"facility","lineage":["https://openalex.org/I115228651","https://openalex.org/I4210090209","https://openalex.org/I91275662"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Anh Tuan Do","raw_affiliation_strings":["IC-Design Department, Institute of Microelectronics (IME), A∗STAR, Singapore; School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IC-Design Department, Institute of Microelectronics (IME), A∗STAR, Singapore; School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I4210090209","https://openalex.org/I172675005"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":8,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.4163,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.62111339,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":95},"biblio":{"volume":"345","issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T10581","display_name":"Neural dynamics and brain function","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2805","display_name":"Cognitive Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8129770755767822},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.7692190408706665},{"id":"https://openalex.org/keywords/spiking-neural-network","display_name":"Spiking neural network","score":0.6453652381896973},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.6392558813095093},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6137996315956116},{"id":"https://openalex.org/keywords/logic-block","display_name":"Logic block","score":0.5645326972007751},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.51875901222229},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.49751022458076477},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4899265170097351},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.4683256447315216},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.4346035420894623},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4000347852706909},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3351444900035858},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.16431719064712524},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.14577332139015198}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8129770755767822},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.7692190408706665},{"id":"https://openalex.org/C11731999","wikidata":"https://www.wikidata.org/wiki/Q9067355","display_name":"Spiking neural network","level":3,"score":0.6453652381896973},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.6392558813095093},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6137996315956116},{"id":"https://openalex.org/C2778325283","wikidata":"https://www.wikidata.org/wiki/Q1125244","display_name":"Logic block","level":3,"score":0.5645326972007751},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.51875901222229},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.49751022458076477},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4899265170097351},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.4683256447315216},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.4346035420894623},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4000347852706909},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3351444900035858},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.16431719064712524},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.14577332139015198},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas45731.2020.9180629","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas45731.2020.9180629","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W345956458","https://openalex.org/W1627996140","https://openalex.org/W1636374184","https://openalex.org/W2023009881","https://openalex.org/W2033100707","https://openalex.org/W2088192327","https://openalex.org/W2138913040","https://openalex.org/W2164653071","https://openalex.org/W2469490737","https://openalex.org/W2906816592","https://openalex.org/W2908346809","https://openalex.org/W2943288550","https://openalex.org/W3120740533","https://openalex.org/W4238614602","https://openalex.org/W6720242923"],"related_works":["https://openalex.org/W2110265185","https://openalex.org/W3146360095","https://openalex.org/W2014521732","https://openalex.org/W3012528295","https://openalex.org/W2024574431","https://openalex.org/W2387100797","https://openalex.org/W2184011203","https://openalex.org/W2787072969","https://openalex.org/W1522517392","https://openalex.org/W2424214691"],"abstract_inverted_index":{"This":[0],"paper":[1],"proposes":[2],"a":[3,13,23,86,95],"scalable":[4],"hardware":[5],"architecture":[6],"for":[7,32,49],"block-based":[8],"spiking":[9,15],"neural":[10],"networks":[11],"utilizing":[12],"multiplierless":[14],"neuron":[16,60],"model.":[17],"These":[18],"blocks":[19,54],"were":[20],"implemented":[21,84],"as":[22,89],"neurocore":[24,77],"mesh":[25],"generated":[26],"from":[27],"an":[28,90],"interconnect":[29,97],"algorithm,":[30],"allowing":[31],"seamless":[33],"scalability":[34],"of":[35,75,104],"the":[36,76,102,105],"network":[37,82],"size":[38],"while":[39],"mitigating":[40],"connectivity":[41],"errors.":[42],"The":[43,58,81],"routing":[44],"fabric":[45,96],"asynchronous":[46],"protocol":[47],"allows":[48],"critical":[50],"timing":[51],"paths":[52],"between":[53],"to":[55,66,73,113],"be":[56],"relaxed.":[57],"proposed":[59,106],"model":[61],"consumed":[62],"less":[63],"logic":[64,78],"compared":[65],"standard":[67],"models":[68],"with":[69],"multipliers,":[70],"reducing":[71],"up":[72],"16%":[74],"cell":[79],"area.":[80],"was":[83],"alongside":[85],"computing":[87],"subsystem":[88],"FPGA-based":[91],"system-on-chip,":[92],"communicating":[93],"via":[94],"bridge.":[98],"Experimental":[99],"results":[100],"validate":[101],"functionality":[103],"system,":[107],"and":[108],"achieved":[109],"comparable":[110],"classification":[111],"accuracy":[112],"existing":[114],"works.":[115]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}