{"id":"https://openalex.org/W3091131165","doi":"https://doi.org/10.1109/iscas45731.2020.9180600","title":"An Efficient Gradient Boosting Approach for PVT Aware Estimation of Leakage Power and Propagation Delay in CMOS/FinFET Digital Cells","display_name":"An Efficient Gradient Boosting Approach for PVT Aware Estimation of Leakage Power and Propagation Delay in CMOS/FinFET Digital Cells","publication_year":2020,"publication_date":"2020-09-29","ids":{"openalex":"https://openalex.org/W3091131165","doi":"https://doi.org/10.1109/iscas45731.2020.9180600","mag":"3091131165"},"language":"en","primary_location":{"id":"doi:10.1109/iscas45731.2020.9180600","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas45731.2020.9180600","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5021745462","display_name":"Deepthi Amuru","orcid":"https://orcid.org/0000-0003-0793-3244"},"institutions":[{"id":"https://openalex.org/I65181880","display_name":"Indian Institute of Technology Hyderabad","ror":"https://ror.org/01j4v3x97","country_code":"IN","type":"education","lineage":["https://openalex.org/I65181880"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Deepthi Amuru","raw_affiliation_strings":["Center for VLSI and Embedded Systems Technology (CVEST), International Institute of Information Technology, Hyderabad (IIIT-H) Hyderabad, India - 500032"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Center for VLSI and Embedded Systems Technology (CVEST), International Institute of Information Technology, Hyderabad (IIIT-H) Hyderabad, India - 500032","institution_ids":["https://openalex.org/I65181880"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049447247","display_name":"Salman Ahmed","orcid":"https://orcid.org/0000-0003-0290-5367"},"institutions":[{"id":"https://openalex.org/I65181880","display_name":"Indian Institute of Technology Hyderabad","ror":"https://ror.org/01j4v3x97","country_code":"IN","type":"education","lineage":["https://openalex.org/I65181880"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Mohammed Salman Ahmed","raw_affiliation_strings":["Center for VLSI and Embedded Systems Technology (CVEST), International Institute of Information Technology, Hyderabad (IIIT-H) Hyderabad, India - 500032"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Center for VLSI and Embedded Systems Technology (CVEST), International Institute of Information Technology, Hyderabad (IIIT-H) Hyderabad, India - 500032","institution_ids":["https://openalex.org/I65181880"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5060396811","display_name":"Zia Abbas","orcid":"https://orcid.org/0000-0002-3747-3640"},"institutions":[{"id":"https://openalex.org/I65181880","display_name":"Indian Institute of Technology Hyderabad","ror":"https://ror.org/01j4v3x97","country_code":"IN","type":"education","lineage":["https://openalex.org/I65181880"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Zia Abbas","raw_affiliation_strings":["Center for VLSI and Embedded Systems Technology (CVEST), International Institute of Information Technology, Hyderabad (IIIT-H) Hyderabad, India - 500032"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Center for VLSI and Embedded Systems Technology (CVEST), International Institute of Information Technology, Hyderabad (IIIT-H) Hyderabad, India - 500032","institution_ids":["https://openalex.org/I65181880"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I65181880"],"apc_list":null,"apc_paid":null,"fwci":0.8325,"has_fulltext":false,"cited_by_count":23,"citation_normalized_percentile":{"value":0.73278601,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.8367035388946533},{"id":"https://openalex.org/keywords/boosting","display_name":"Boosting (machine learning)","score":0.674025297164917},{"id":"https://openalex.org/keywords/leakage-power","display_name":"Leakage power","score":0.6658949255943298},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6422777771949768},{"id":"https://openalex.org/keywords/propagation-delay","display_name":"Propagation delay","score":0.6126301884651184},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5727834701538086},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.5725232362747192},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.46443232893943787},{"id":"https://openalex.org/keywords/gradient-boosting","display_name":"Gradient boosting","score":0.4579251706600189},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.4162781834602356},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3219892382621765},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.32175007462501526},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2448597550392151},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.20697560906410217},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.15054142475128174}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.8367035388946533},{"id":"https://openalex.org/C46686674","wikidata":"https://www.wikidata.org/wiki/Q466303","display_name":"Boosting (machine learning)","level":2,"score":0.674025297164917},{"id":"https://openalex.org/C2987719587","wikidata":"https://www.wikidata.org/wiki/Q1811428","display_name":"Leakage power","level":4,"score":0.6658949255943298},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6422777771949768},{"id":"https://openalex.org/C90806461","wikidata":"https://www.wikidata.org/wiki/Q1144416","display_name":"Propagation delay","level":2,"score":0.6126301884651184},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5727834701538086},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.5725232362747192},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.46443232893943787},{"id":"https://openalex.org/C70153297","wikidata":"https://www.wikidata.org/wiki/Q5591907","display_name":"Gradient boosting","level":3,"score":0.4579251706600189},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.4162781834602356},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3219892382621765},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.32175007462501526},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2448597550392151},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.20697560906410217},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.15054142475128174},{"id":"https://openalex.org/C169258074","wikidata":"https://www.wikidata.org/wiki/Q245748","display_name":"Random forest","level":2,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas45731.2020.9180600","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas45731.2020.9180600","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.800000011920929,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1829868563","https://openalex.org/W1968204888","https://openalex.org/W1982303956","https://openalex.org/W1994683259","https://openalex.org/W2025338205","https://openalex.org/W2043842808","https://openalex.org/W2080586212","https://openalex.org/W2118116654","https://openalex.org/W2168559772","https://openalex.org/W2251988125","https://openalex.org/W2496455844","https://openalex.org/W2575574673","https://openalex.org/W2588191434","https://openalex.org/W2602628321","https://openalex.org/W2787418442","https://openalex.org/W2800676352","https://openalex.org/W2968290676","https://openalex.org/W3142526730","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W2967733078","https://openalex.org/W3204430031","https://openalex.org/W3137904399","https://openalex.org/W4310492845","https://openalex.org/W2885778889","https://openalex.org/W2766514146","https://openalex.org/W2885516856","https://openalex.org/W4289703016","https://openalex.org/W3094138326","https://openalex.org/W4310224730"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"we":[3],"propose":[4],"an":[5,85],"accurate":[6],"and":[7,22,38,49,66,94],"computationally":[8],"efficient":[9],"Gradient":[10],"Boosting":[11],"approach":[12,59],"for":[13],"the":[14,26,35,57,70,73,111],"estimation":[15,114],"of":[16,56,72,88],"statistical":[17],"variations":[18,42],"aware":[19],"leakage":[20,36],"power":[21,37],"propagation":[23,39],"delay":[24,40],"in":[25,43,91,107],"CMOS/FinFET":[27],"standard":[28,96,121],"digital":[29,97],"cells.":[30],"The":[31,53],"proposed":[32,58,74],"model":[33,75],"estimates":[34],"w.r.t":[41,99],"process,":[44],"temperature":[45],"(-55\u00b0C":[46],"to":[47],"125\u00b0C)":[48],"supply":[50],"voltage(\u00b110%":[51],"variations).":[52],"distinguishing":[54],"feature":[55],"is":[60,76],"its":[61],"compatibility":[62],"with":[63,78,103],"both":[64],"CMOS":[65,93],"FinFET":[67,95],"technologies.":[68],"Moreover,":[69],"performance":[71],"consistent":[77],"various":[79],"technology":[80],"nodes.":[81],"Exhaustive":[82],"tests":[83],"report":[84],"average":[86],"error":[87],"<;":[89],"1%":[90],"16nm":[92],"cells":[98,122],"analog":[100],"HSPICE":[101],"simulations":[102],"several":[104],"orders":[105],"increase":[106],"computational":[108],"speed.":[109],"Further,":[110],"complex":[112],"cell":[113],"can":[115],"be":[116],"carried":[117],"out":[118],"through":[119],"precharacterized":[120],"abstaining":[123],"longer":[124],"simulations.":[125]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":9},{"year":2024,"cited_by_count":5},{"year":2023,"cited_by_count":5},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1}],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}
