{"id":"https://openalex.org/W3091268139","doi":"https://doi.org/10.1109/iscas45731.2020.9180594","title":"Evaluation of Non-Series-Parallel Structures for BTI-Aware Automated Design Methodologies","display_name":"Evaluation of Non-Series-Parallel Structures for BTI-Aware Automated Design Methodologies","publication_year":2020,"publication_date":"2020-09-29","ids":{"openalex":"https://openalex.org/W3091268139","doi":"https://doi.org/10.1109/iscas45731.2020.9180594","mag":"3091268139"},"language":"en","primary_location":{"id":"doi:10.1109/iscas45731.2020.9180594","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas45731.2020.9180594","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5050032751","display_name":"Henrique Kessler","orcid":"https://orcid.org/0000-0002-1840-3794"},"institutions":[{"id":"https://openalex.org/I169248161","display_name":"Universidade Federal de Pelotas","ror":"https://ror.org/05msy9z54","country_code":"BR","type":"education","lineage":["https://openalex.org/I169248161"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Henrique Kessler","raw_affiliation_strings":["Centro de Desenvolvimento Tecnológico − CDTec, Universidade Federal de Pelotas − UFPel, Pelotas, Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Centro de Desenvolvimento Tecnológico − CDTec, Universidade Federal de Pelotas − UFPel, Pelotas, Brazil","institution_ids":["https://openalex.org/I169248161"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010478240","display_name":"Pl\u00ednio Finkenauer","orcid":"https://orcid.org/0000-0002-3533-7186"},"institutions":[{"id":"https://openalex.org/I169248161","display_name":"Universidade Federal de Pelotas","ror":"https://ror.org/05msy9z54","country_code":"BR","type":"education","lineage":["https://openalex.org/I169248161"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Pl\u00ednio Finkenauer","raw_affiliation_strings":["Centro de Desenvolvimento Tecnológico − CDTec, Universidade Federal de Pelotas − UFPel, Pelotas, Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Centro de Desenvolvimento Tecnológico − CDTec, Universidade Federal de Pelotas − UFPel, Pelotas, Brazil","institution_ids":["https://openalex.org/I169248161"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017100276","display_name":"Thiago H. Both","orcid":"https://orcid.org/0000-0003-0016-1894"},"institutions":[{"id":"https://openalex.org/I169248161","display_name":"Universidade Federal de Pelotas","ror":"https://ror.org/05msy9z54","country_code":"BR","type":"education","lineage":["https://openalex.org/I169248161"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Thiago H. Both","raw_affiliation_strings":["Centro de Engenharias − CENG, Universidade Federal de Pelotas − UFPel, Pelotas, Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Centro de Engenharias − CENG, Universidade Federal de Pelotas − UFPel, Pelotas, Brazil","institution_ids":["https://openalex.org/I169248161"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5104099144","display_name":"Leomar da Rosa","orcid":null},"institutions":[{"id":"https://openalex.org/I169248161","display_name":"Universidade Federal de Pelotas","ror":"https://ror.org/05msy9z54","country_code":"BR","type":"education","lineage":["https://openalex.org/I169248161"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Leomar da Rosa","raw_affiliation_strings":["Centro de Desenvolvimento Tecnológico − CDTec, Universidade Federal de Pelotas − UFPel, Pelotas, Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Centro de Desenvolvimento Tecnológico − CDTec, Universidade Federal de Pelotas − UFPel, Pelotas, Brazil","institution_ids":["https://openalex.org/I169248161"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5010001207","display_name":"Vin\u00edcius Valduga de Almeida Camargo","orcid":"https://orcid.org/0000-0003-2006-3642"},"institutions":[{"id":"https://openalex.org/I169248161","display_name":"Universidade Federal de Pelotas","ror":"https://ror.org/05msy9z54","country_code":"BR","type":"education","lineage":["https://openalex.org/I169248161"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Vin\u00edcius V. Camargo","raw_affiliation_strings":["Centro de Desenvolvimento Tecnológico − CDTec, Universidade Federal de Pelotas − UFPel, Pelotas, Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Centro de Desenvolvimento Tecnológico − CDTec, Universidade Federal de Pelotas − UFPel, Pelotas, Brazil","institution_ids":["https://openalex.org/I169248161"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I169248161"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness (evolution)","score":0.7565504908561707},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6242796778678894},{"id":"https://openalex.org/keywords/series","display_name":"Series (stratigraphy)","score":0.6057045459747314},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5730265974998474},{"id":"https://openalex.org/keywords/series-and-parallel-circuits","display_name":"Series and parallel circuits","score":0.5478141903877258},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4851701855659485},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.43732404708862305},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.40981948375701904},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.37262359261512756},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3625069260597229},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.35633206367492676},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19739550352096558},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.16660135984420776},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.15145957469940186}],"concepts":[{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.7565504908561707},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6242796778678894},{"id":"https://openalex.org/C143724316","wikidata":"https://www.wikidata.org/wiki/Q312468","display_name":"Series (stratigraphy)","level":2,"score":0.6057045459747314},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5730265974998474},{"id":"https://openalex.org/C95023266","wikidata":"https://www.wikidata.org/wiki/Q55738334","display_name":"Series and parallel circuits","level":3,"score":0.5478141903877258},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4851701855659485},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.43732404708862305},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.40981948375701904},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.37262359261512756},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3625069260597229},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.35633206367492676},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19739550352096558},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.16660135984420776},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.15145957469940186},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas45731.2020.9180594","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas45731.2020.9180594","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W1499580424","https://openalex.org/W1901339374","https://openalex.org/W1987838655","https://openalex.org/W2000038726","https://openalex.org/W2018989845","https://openalex.org/W2047998489","https://openalex.org/W2088115909","https://openalex.org/W2110033475","https://openalex.org/W2145176857","https://openalex.org/W2150424241","https://openalex.org/W2159087234","https://openalex.org/W2168992600","https://openalex.org/W2173208083","https://openalex.org/W2309928151","https://openalex.org/W2625825863","https://openalex.org/W2768326850","https://openalex.org/W2899297761","https://openalex.org/W2905258051","https://openalex.org/W2921402340","https://openalex.org/W2941700911","https://openalex.org/W3147209550","https://openalex.org/W4212971671"],"related_works":["https://openalex.org/W2588941787","https://openalex.org/W2098419840","https://openalex.org/W1966764473","https://openalex.org/W2789349722","https://openalex.org/W1985308002","https://openalex.org/W2121963733","https://openalex.org/W1977171228","https://openalex.org/W2059422871","https://openalex.org/W2766377030","https://openalex.org/W2041787842"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,58],"study":[4],"comparing":[5],"complex":[6],"gates":[7,56],"that":[8,31],"use":[9],"Series-Parallel":[10],"and":[11,18,39,49,67,79,83],"Non-Series-Parallel":[12],"associations,":[13],"including":[14],"the":[15,19,32,35,53,65],"time-zero":[16],"variability":[17,82],"BTI":[20],"impact.":[21],"A":[22],"comparison":[23],"of":[24,37,41],"53":[25],"logical":[26],"functions":[27],"was":[28],"performed,":[29],"showing":[30],"reduction":[33],"in":[34,76],"number":[36],"transistors":[38],"area":[40],"NSP":[42],"structures":[43],"does":[44],"not":[45],"assure":[46],"better":[47,74],"power":[48],"timing":[50],"results,":[51],"with":[52],"SP":[54],"structure":[55],"presenting":[57],"smaller":[59],"power.":[60],"Structures":[61],"built":[62],"where":[63],"both":[64],"pull-up":[66],"pull-down":[68],"networks":[69],"are":[70],"optimized":[71],"individually":[72],"presented":[73],"results":[75],"average":[77],"value":[78],"robustness":[80],"to":[81],"aging.":[84]},"counts_by_year":[{"year":2021,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}