{"id":"https://openalex.org/W3089765345","doi":"https://doi.org/10.1109/iscas45731.2020.9180589","title":"Simulation and Formal: The Best of Both Domains for Instruction Set Verification of RISC-V Based Processors","display_name":"Simulation and Formal: The Best of Both Domains for Instruction Set Verification of RISC-V Based Processors","publication_year":2020,"publication_date":"2020-09-29","ids":{"openalex":"https://openalex.org/W3089765345","doi":"https://doi.org/10.1109/iscas45731.2020.9180589","mag":"3089765345"},"language":"en","primary_location":{"id":"doi:10.1109/iscas45731.2020.9180589","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas45731.2020.9180589","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5076615981","display_name":"Ckristian Duran","orcid":"https://orcid.org/0000-0003-3746-8320"},"institutions":[{"id":"https://openalex.org/I115684694","display_name":"Industrial University of Santander","ror":"https://ror.org/00xc1d948","country_code":"CO","type":"education","lineage":["https://openalex.org/I115684694"]}],"countries":["CO"],"is_corresponding":false,"raw_author_name":"Ckristian Duran","raw_affiliation_strings":["Integrated Systems Research Group − OnChip, Universidad Industrial de Santander − Colombia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Integrated Systems Research Group − OnChip, Universidad Industrial de Santander − Colombia","institution_ids":["https://openalex.org/I115684694"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020539302","display_name":"Hanssel Morales","orcid":"https://orcid.org/0000-0002-5521-6525"},"institutions":[{"id":"https://openalex.org/I115684694","display_name":"Industrial University of Santander","ror":"https://ror.org/00xc1d948","country_code":"CO","type":"education","lineage":["https://openalex.org/I115684694"]}],"countries":["CO"],"is_corresponding":false,"raw_author_name":"Hanssel Morales","raw_affiliation_strings":["Integrated Systems Research Group − OnChip, Universidad Industrial de Santander − Colombia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Integrated Systems Research Group − OnChip, Universidad Industrial de Santander − Colombia","institution_ids":["https://openalex.org/I115684694"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101935883","display_name":"Camilo Rojas","orcid":"https://orcid.org/0000-0001-8941-408X"},"institutions":[{"id":"https://openalex.org/I115684694","display_name":"Industrial University of Santander","ror":"https://ror.org/00xc1d948","country_code":"CO","type":"education","lineage":["https://openalex.org/I115684694"]}],"countries":["CO"],"is_corresponding":false,"raw_author_name":"Camilo Rojas","raw_affiliation_strings":["Integrated Systems Research Group − OnChip, Universidad Industrial de Santander − Colombia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Integrated Systems Research Group − OnChip, Universidad Industrial de Santander − Colombia","institution_ids":["https://openalex.org/I115684694"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083953105","display_name":"Annachiara Ruospo","orcid":"https://orcid.org/0000-0003-2040-9762"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Annachiara Ruospo","raw_affiliation_strings":["Politecnico di Torino − Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Torino − Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009336869","display_name":"Ernesto S\u00e1nchez","orcid":"https://orcid.org/0000-0002-7042-295X"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Ernesto Sanchez","raw_affiliation_strings":["Politecnico di Torino − Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Torino − Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5070510631","display_name":"Elkim Roa","orcid":"https://orcid.org/0000-0003-0290-7493"},"institutions":[{"id":"https://openalex.org/I115684694","display_name":"Industrial University of Santander","ror":"https://ror.org/00xc1d948","country_code":"CO","type":"education","lineage":["https://openalex.org/I115684694"]}],"countries":["CO"],"is_corresponding":false,"raw_author_name":"Elkim Roa","raw_affiliation_strings":["Integrated Systems Research Group − OnChip, Universidad Industrial de Santander − Colombia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Integrated Systems Research Group − OnChip, Universidad Industrial de Santander − Colombia","institution_ids":["https://openalex.org/I115684694"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.2826,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.81610801,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10743","display_name":"Software Testing and Debugging Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1712","display_name":"Software"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10743","display_name":"Software Testing and Debugging Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1712","display_name":"Software"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8680893182754517},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.7014902234077454},{"id":"https://openalex.org/keywords/functional-verification","display_name":"Functional verification","score":0.6304003000259399},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.5959723591804504},{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"Reduced instruction set computing","score":0.5449070930480957},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.5110760927200317},{"id":"https://openalex.org/keywords/high-level-verification","display_name":"High-level verification","score":0.5069828033447266},{"id":"https://openalex.org/keywords/runtime-verification","display_name":"Runtime verification","score":0.49697330594062805},{"id":"https://openalex.org/keywords/intelligent-verification","display_name":"Intelligent verification","score":0.4949776530265808},{"id":"https://openalex.org/keywords/software-verification","display_name":"Software verification","score":0.47501739859580994},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.44107621908187866},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.42078691720962524},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.2983793616294861},{"id":"https://openalex.org/keywords/software-development","display_name":"Software development","score":0.16165894269943237},{"id":"https://openalex.org/keywords/software-construction","display_name":"Software construction","score":0.111612468957901}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8680893182754517},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.7014902234077454},{"id":"https://openalex.org/C62460635","wikidata":"https://www.wikidata.org/wiki/Q5508853","display_name":"Functional verification","level":3,"score":0.6304003000259399},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.5959723591804504},{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.5449070930480957},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.5110760927200317},{"id":"https://openalex.org/C187250869","wikidata":"https://www.wikidata.org/wiki/Q5754573","display_name":"High-level verification","level":5,"score":0.5069828033447266},{"id":"https://openalex.org/C202973057","wikidata":"https://www.wikidata.org/wiki/Q7380130","display_name":"Runtime verification","level":3,"score":0.49697330594062805},{"id":"https://openalex.org/C3406870","wikidata":"https://www.wikidata.org/wiki/Q6044160","display_name":"Intelligent verification","level":5,"score":0.4949776530265808},{"id":"https://openalex.org/C33054407","wikidata":"https://www.wikidata.org/wiki/Q6504747","display_name":"Software verification","level":5,"score":0.47501739859580994},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.44107621908187866},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.42078691720962524},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.2983793616294861},{"id":"https://openalex.org/C529173508","wikidata":"https://www.wikidata.org/wiki/Q638608","display_name":"Software development","level":3,"score":0.16165894269943237},{"id":"https://openalex.org/C186846655","wikidata":"https://www.wikidata.org/wiki/Q3398377","display_name":"Software construction","level":4,"score":0.111612468957901}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas45731.2020.9180589","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas45731.2020.9180589","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/16","score":0.800000011920929,"display_name":"Peace, Justice and strong institutions"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1529461101","https://openalex.org/W2120623098","https://openalex.org/W2919113869","https://openalex.org/W2945056715"],"related_works":["https://openalex.org/W3036403349","https://openalex.org/W2361881307","https://openalex.org/W2392047570","https://openalex.org/W2035244079","https://openalex.org/W2059150015","https://openalex.org/W2962898432","https://openalex.org/W4205300843","https://openalex.org/W2350806125","https://openalex.org/W2355428260","https://openalex.org/W4301348901"],"abstract_inverted_index":{"The":[0,91,115],"instruction":[1,32,112,147],"set":[2,61,113],"architecture":[3],"(ISA)":[4],"specifies":[5],"a":[6,23,35,44,74,85,118,140,172,195],"contract":[7],"between":[8],"hardware":[9],"and":[10,82,107,154],"software;":[11],"it":[12],"covers":[13],"all":[14],"possible":[15],"operations":[16],"that":[17],"have":[18],"to":[19,47,62,101,130,143,157,164,189],"be":[20],"performed":[21],"by":[22,149,179],"processor,":[24],"regardless":[25],"of":[26,65,104,161,176,182],"the":[27,31,40,66,105,108,131,183,191],"implemented":[28],"architecture.":[29],"Verifying":[30],"execution":[33,37],"against":[34,110],"golden":[36],"model":[38],"following":[39],"ISA":[41,132,197],"is":[42,117],"becoming":[43],"common":[45],"practice":[46],"verify":[48],"processors.":[49],"Despite":[50],"many":[51],"potential":[52],"applications,":[53],"existing":[54],"verification":[55,75,120,148,205],"frameworks":[56],"require":[57],"an":[58,111,123],"extensive":[59,165],"test":[60,106,167],"cover":[63],"most":[64],"processor":[67,127,151],"states.":[68],"In":[69],"this":[70,169],"paper,":[71],"we":[72,138],"suggest":[73],"scheme":[76],"combining":[77,135],"two":[78,203],"different":[79,159,204],"domains,":[80],"simulation-":[81],"formal-verification,":[83],"establishing":[84],"methodology":[86],"for":[87],"exclusive":[88],"error":[89],"detection.":[90],"first":[92],"approach":[93,170,193],"drives":[94],"automatic":[95],"program":[96],"generation":[97],"using":[98],"genetic":[99],"algorithms":[100],"maximize":[102],"coverage":[103,153],"contrast":[109],"simulator.":[114],"second":[116],"formal":[119,155],"approach,":[121],"where":[122],"interface":[124],"carries":[125],"specific":[126],"states":[128,178],"according":[129],"specification.":[133],"By":[134],"these":[136],"two,":[137],"present":[139],"reliable":[141],"way":[142],"perform":[144],"more":[145,173],"accurate":[146],"increasing":[150],"state":[152],"assertions":[156],"detect":[158],"kinds":[160],"errors.":[162],"Compared":[163],"torture":[166],"sets,":[168],"reaches":[171],"significant":[174],"number":[175],"internal":[177],"taking":[180],"advantage":[181],"exercised":[184],"abstractions.":[185],"Among":[186],"remarkable":[187],"results":[188],"highlight,":[190],"proposed":[192],"detected":[194],"RISC-V":[196],"specification":[198],"gap":[199],"revealing":[200],"ambiguity":[201],"from":[202],"perspectives.":[206]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}