{"id":"https://openalex.org/W3089576475","doi":"https://doi.org/10.1109/iscas45731.2020.9180449","title":"Exploiting Single-Well Design for Energy-Efficient Ultra-Wide Voltage Range Dual Mode Logic-Based Digital Circuits in 28nm FD-SOI Technology","display_name":"Exploiting Single-Well Design for Energy-Efficient Ultra-Wide Voltage Range Dual Mode Logic-Based Digital Circuits in 28nm FD-SOI Technology","publication_year":2020,"publication_date":"2020-09-29","ids":{"openalex":"https://openalex.org/W3089576475","doi":"https://doi.org/10.1109/iscas45731.2020.9180449","mag":"3089576475"},"language":"en","primary_location":{"id":"doi:10.1109/iscas45731.2020.9180449","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas45731.2020.9180449","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5004107991","display_name":"Ramiro Taco","orcid":"https://orcid.org/0000-0003-3046-2364"},"institutions":[{"id":"https://openalex.org/I13955877","display_name":"Bar-Ilan University","ror":"https://ror.org/03kgsv495","country_code":"IL","type":"education","lineage":["https://openalex.org/I13955877"]},{"id":"https://openalex.org/I69094615","display_name":"Universidad San Francisco de Quito","ror":"https://ror.org/01r2c3v86","country_code":"EC","type":"education","lineage":["https://openalex.org/I69094615"]}],"countries":["EC","IL"],"is_corresponding":false,"raw_author_name":"Ramiro Taco","raw_affiliation_strings":["Bar Ilan University, Ramat Gan, Israel; Universidad San Francisco de Quito, Quito, Ecuador"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Bar Ilan University, Ramat Gan, Israel; Universidad San Francisco de Quito, Quito, Ecuador","institution_ids":["https://openalex.org/I13955877","https://openalex.org/I69094615"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007161424","display_name":"Leonid Yavits","orcid":"https://orcid.org/0000-0001-5248-3997"},"institutions":[{"id":"https://openalex.org/I13955877","display_name":"Bar-Ilan University","ror":"https://ror.org/03kgsv495","country_code":"IL","type":"education","lineage":["https://openalex.org/I13955877"]}],"countries":["IL"],"is_corresponding":false,"raw_author_name":"Leonid Yavits","raw_affiliation_strings":["Bar Ilan University, Ramat Gan, Israel"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Bar Ilan University, Ramat Gan, Israel","institution_ids":["https://openalex.org/I13955877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043898382","display_name":"Netanel Shavit","orcid":"https://orcid.org/0000-0003-2011-6329"},"institutions":[{"id":"https://openalex.org/I13955877","display_name":"Bar-Ilan University","ror":"https://ror.org/03kgsv495","country_code":"IL","type":"education","lineage":["https://openalex.org/I13955877"]}],"countries":["IL"],"is_corresponding":false,"raw_author_name":"Netanel Shavit","raw_affiliation_strings":["Bar Ilan University, Ramat Gan, Israel"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Bar Ilan University, Ramat Gan, Israel","institution_ids":["https://openalex.org/I13955877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088097531","display_name":"Inbal Stanger","orcid":"https://orcid.org/0000-0002-9038-1278"},"institutions":[{"id":"https://openalex.org/I13955877","display_name":"Bar-Ilan University","ror":"https://ror.org/03kgsv495","country_code":"IL","type":"education","lineage":["https://openalex.org/I13955877"]}],"countries":["IL"],"is_corresponding":false,"raw_author_name":"Inbal Stanger","raw_affiliation_strings":["Bar Ilan University, Ramat Gan, Israel"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Bar Ilan University, Ramat Gan, Israel","institution_ids":["https://openalex.org/I13955877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016654766","display_name":"Marco Lanuzza","orcid":"https://orcid.org/0000-0002-6480-9218"},"institutions":[{"id":"https://openalex.org/I45204951","display_name":"University of Calabria","ror":"https://ror.org/02rc97e94","country_code":"IT","type":"education","lineage":["https://openalex.org/I45204951"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Marco Lanuzza","raw_affiliation_strings":["University of Calabria, Cosenza, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Calabria, Cosenza, Italy","institution_ids":["https://openalex.org/I45204951"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5065902823","display_name":"Alexander Fish","orcid":"https://orcid.org/0000-0002-4994-1536"},"institutions":[{"id":"https://openalex.org/I13955877","display_name":"Bar-Ilan University","ror":"https://ror.org/03kgsv495","country_code":"IL","type":"education","lineage":["https://openalex.org/I13955877"]}],"countries":["IL"],"is_corresponding":false,"raw_author_name":"Alexander Fish","raw_affiliation_strings":["Bar Ilan University, Ramat Gan, Israel"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Bar Ilan University, Ramat Gan, Israel","institution_ids":["https://openalex.org/I13955877"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/silicon-on-insulator","display_name":"Silicon on insulator","score":0.73734450340271},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6332117915153503},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5998353958129883},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.59088134765625},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5885212421417236},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.5675497055053711},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.546170175075531},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5268377661705017},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.5187537670135498},{"id":"https://openalex.org/keywords/energy-consumption","display_name":"Energy consumption","score":0.49228373169898987},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.4697352349758148},{"id":"https://openalex.org/keywords/logic-level","display_name":"Logic level","score":0.4674476087093353},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4532710611820221},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4347577393054962},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.33994147181510925},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2529561519622803},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.1447429656982422},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.11251699924468994},{"id":"https://openalex.org/keywords/silicon","display_name":"Silicon","score":0.1108793318271637}],"concepts":[{"id":"https://openalex.org/C53143962","wikidata":"https://www.wikidata.org/wiki/Q1478788","display_name":"Silicon on insulator","level":3,"score":0.73734450340271},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6332117915153503},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5998353958129883},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.59088134765625},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5885212421417236},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.5675497055053711},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.546170175075531},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5268377661705017},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.5187537670135498},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.49228373169898987},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.4697352349758148},{"id":"https://openalex.org/C146569638","wikidata":"https://www.wikidata.org/wiki/Q173378","display_name":"Logic level","level":3,"score":0.4674476087093353},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4532710611820221},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4347577393054962},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.33994147181510925},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2529561519622803},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.1447429656982422},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.11251699924468994},{"id":"https://openalex.org/C544956773","wikidata":"https://www.wikidata.org/wiki/Q670","display_name":"Silicon","level":2,"score":0.1108793318271637}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas45731.2020.9180449","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas45731.2020.9180449","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W2009441606","https://openalex.org/W2037053684","https://openalex.org/W2037299409","https://openalex.org/W2038049046","https://openalex.org/W2039087797","https://openalex.org/W2081957907","https://openalex.org/W2088481695","https://openalex.org/W2116100358","https://openalex.org/W2122393626","https://openalex.org/W2127656032","https://openalex.org/W2130718940","https://openalex.org/W2185598583","https://openalex.org/W2509037689","https://openalex.org/W2758515463","https://openalex.org/W2904320587","https://openalex.org/W4239157614","https://openalex.org/W6672540876","https://openalex.org/W6677415780"],"related_works":["https://openalex.org/W2082591327","https://openalex.org/W2108396794","https://openalex.org/W2171566066","https://openalex.org/W2098419840","https://openalex.org/W24944685","https://openalex.org/W6024065","https://openalex.org/W2178512053","https://openalex.org/W2125567818","https://openalex.org/W2063209251","https://openalex.org/W2766377030"],"abstract_inverted_index":{"In":[0],"this":[1],"paper":[2],"we":[3,59],"evaluate":[4],"the":[5,25,33,37,67,71,82],"implementation":[6,84],"options":[7],"of":[8,24,27,36,77,102],"energy-efficient":[9,45],"dual":[10],"mode":[11,109],"logic":[12],"(DML)":[13,31],"circuits":[14,48],"in":[15],"28nm":[16],"fully":[17],"depleted":[18],"silicon-on-insulator":[19],"(FD-SOI)":[20],"technology.":[21],"The":[22],"combination":[23],"flexibility":[26],"Dual":[28],"Mode":[29],"Logic":[30],"and":[32,98],"unique":[34],"characteristics":[35],"FD-SOI":[38,68],"technology":[39],"has":[40],"enormous":[41],"potential":[42],"to":[43,112,118],"design":[44],"adaptive":[46],"digital":[47],"operating":[49],"on":[50],"an":[51],"ultra-wide":[52],"voltage":[53],"range.":[54],"As":[55],"a":[56,86],"main":[57],"result,":[58],"demonstrate":[60],"that":[61],"single":[62],"well":[63],"option":[64],"offered":[65],"by":[66,96],"greatly":[69],"extends":[70],"low-granularity":[72],"energy-delay":[73],"(E-D)":[74],"optimization":[75],"capability":[76],"DML-based":[78],"designs.":[79],"By":[80],"exploiting":[81],"above":[83],"strategy,":[85],"16-bit":[87],"DML":[88],"carry":[89],"skip":[90],"adder":[91],"reduces":[92],"its":[93,100,107,119],"energy":[94],"consumption":[95],"41%":[97],"increases":[99],"speed":[101],"about":[103],"26%":[104],"when":[105],"changing":[106],"operation":[108],"(from":[110],"static":[111],"dynamic)":[113],"at":[114],"0.4V":[115],"as":[116],"compared":[117],"equivalent":[120],"standard":[121],"CMOS":[122],"design.":[123]},"counts_by_year":[],"updated_date":"2026-07-22T07:51:19.307946","created_date":"2025-10-10T00:00:00"}
