{"id":"https://openalex.org/W2943476754","doi":"https://doi.org/10.1109/iscas.2019.8702753","title":"Systolic Building Block for Logic-on-Logic 3D-IC Implementations of Convolutional Neural Networks","display_name":"Systolic Building Block for Logic-on-Logic 3D-IC Implementations of Convolutional Neural Networks","publication_year":2019,"publication_date":"2019-05-01","ids":{"openalex":"https://openalex.org/W2943476754","doi":"https://doi.org/10.1109/iscas.2019.8702753","mag":"2943476754"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2019.8702753","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2019.8702753","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5066867900","display_name":"H. T. Kung","orcid":"https://orcid.org/0000-0002-3348-3788"},"institutions":[{"id":"https://openalex.org/I2801851002","display_name":"Harvard University Press","ror":"https://ror.org/006v7bf86","country_code":"US","type":"other","lineage":["https://openalex.org/I136199984","https://openalex.org/I2801851002"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"H. T. Kung","raw_affiliation_strings":["Harvard University"],"affiliations":[{"raw_affiliation_string":"Harvard University","institution_ids":["https://openalex.org/I2801851002"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021927383","display_name":"Bradley McDanel","orcid":"https://orcid.org/0000-0001-6684-8918"},"institutions":[{"id":"https://openalex.org/I2801851002","display_name":"Harvard University Press","ror":"https://ror.org/006v7bf86","country_code":"US","type":"other","lineage":["https://openalex.org/I136199984","https://openalex.org/I2801851002"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Bradley McDanel","raw_affiliation_strings":["Harvard University"],"affiliations":[{"raw_affiliation_string":"Harvard University","institution_ids":["https://openalex.org/I2801851002"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013517247","display_name":"Sai Qian Zhang","orcid":"https://orcid.org/0000-0002-4815-9235"},"institutions":[{"id":"https://openalex.org/I2801851002","display_name":"Harvard University Press","ror":"https://ror.org/006v7bf86","country_code":"US","type":"other","lineage":["https://openalex.org/I136199984","https://openalex.org/I2801851002"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sai Qian Zhang","raw_affiliation_strings":["Harvard University"],"affiliations":[{"raw_affiliation_string":"Harvard University","institution_ids":["https://openalex.org/I2801851002"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5090568798","display_name":"C. T. Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I1334877674","display_name":"Taiwan Semiconductor Manufacturing Company (United States)","ror":"https://ror.org/02rvfjx92","country_code":"US","type":"company","lineage":["https://openalex.org/I1334877674","https://openalex.org/I4210120917"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"C. T. Wang","raw_affiliation_strings":["TSMC R&D"],"affiliations":[{"raw_affiliation_string":"TSMC R&D","institution_ids":["https://openalex.org/I1334877674"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064519681","display_name":"Jin Cai","orcid":null},"institutions":[{"id":"https://openalex.org/I1334877674","display_name":"Taiwan Semiconductor Manufacturing Company (United States)","ror":"https://ror.org/02rvfjx92","country_code":"US","type":"company","lineage":["https://openalex.org/I1334877674","https://openalex.org/I4210120917"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jin Cai","raw_affiliation_strings":["TSMC R&D"],"affiliations":[{"raw_affiliation_string":"TSMC R&D","institution_ids":["https://openalex.org/I1334877674"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028670062","display_name":"C. Y. Chen","orcid":null},"institutions":[{"id":"https://openalex.org/I1334877674","display_name":"Taiwan Semiconductor Manufacturing Company (United States)","ror":"https://ror.org/02rvfjx92","country_code":"US","type":"company","lineage":["https://openalex.org/I1334877674","https://openalex.org/I4210120917"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"C. Y. Chen","raw_affiliation_strings":["TSMC R&D"],"affiliations":[{"raw_affiliation_string":"TSMC R&D","institution_ids":["https://openalex.org/I1334877674"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5057380570","display_name":"Victor C. Y. Chang","orcid":null},"institutions":[{"id":"https://openalex.org/I1334877674","display_name":"Taiwan Semiconductor Manufacturing Company (United States)","ror":"https://ror.org/02rvfjx92","country_code":"US","type":"company","lineage":["https://openalex.org/I1334877674","https://openalex.org/I4210120917"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Victor C. Y. Chang","raw_affiliation_strings":["TSMC R&D"],"affiliations":[{"raw_affiliation_string":"TSMC R&D","institution_ids":["https://openalex.org/I1334877674"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040121119","display_name":"M. F. Chen","orcid":null},"institutions":[{"id":"https://openalex.org/I1334877674","display_name":"Taiwan Semiconductor Manufacturing Company (United States)","ror":"https://ror.org/02rvfjx92","country_code":"US","type":"company","lineage":["https://openalex.org/I1334877674","https://openalex.org/I4210120917"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M. F. Chen","raw_affiliation_strings":["TSMC R&D"],"affiliations":[{"raw_affiliation_string":"TSMC R&D","institution_ids":["https://openalex.org/I1334877674"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110001077","display_name":"Jack Y. C. Sun","orcid":null},"institutions":[{"id":"https://openalex.org/I1334877674","display_name":"Taiwan Semiconductor Manufacturing Company (United States)","ror":"https://ror.org/02rvfjx92","country_code":"US","type":"company","lineage":["https://openalex.org/I1334877674","https://openalex.org/I4210120917"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jack Y. C. Sun","raw_affiliation_strings":["TSMC R&D"],"affiliations":[{"raw_affiliation_string":"TSMC R&D","institution_ids":["https://openalex.org/I1334877674"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5110022863","display_name":"Douglas Yu","orcid":null},"institutions":[{"id":"https://openalex.org/I1334877674","display_name":"Taiwan Semiconductor Manufacturing Company (United States)","ror":"https://ror.org/02rvfjx92","country_code":"US","type":"company","lineage":["https://openalex.org/I1334877674","https://openalex.org/I4210120917"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Douglas Yu","raw_affiliation_strings":["TSMC R&D"],"affiliations":[{"raw_affiliation_string":"TSMC R&D","institution_ids":["https://openalex.org/I1334877674"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":10,"corresponding_author_ids":["https://openalex.org/A5066867900"],"corresponding_institution_ids":["https://openalex.org/I2801851002"],"apc_list":null,"apc_paid":null,"fwci":0.4821,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.64667089,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7016799449920654},{"id":"https://openalex.org/keywords/convolutional-neural-network","display_name":"Convolutional neural network","score":0.6778854131698608},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.6508463621139526},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.6234297156333923},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.6073175072669983},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5236189961433411},{"id":"https://openalex.org/keywords/logic-block","display_name":"Logic block","score":0.5180613994598389},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.5140479803085327},{"id":"https://openalex.org/keywords/logic-optimization","display_name":"Logic optimization","score":0.45879244804382324},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.42848092317581177},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.35262033343315125},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.3223695158958435},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.32094040513038635},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2542179226875305},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2510479688644409},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.24143698811531067},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.23614326119422913},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.18686717748641968},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.09777626395225525}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7016799449920654},{"id":"https://openalex.org/C81363708","wikidata":"https://www.wikidata.org/wiki/Q17084460","display_name":"Convolutional neural network","level":2,"score":0.6778854131698608},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.6508463621139526},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.6234297156333923},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.6073175072669983},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5236189961433411},{"id":"https://openalex.org/C2778325283","wikidata":"https://www.wikidata.org/wiki/Q1125244","display_name":"Logic block","level":3,"score":0.5180613994598389},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.5140479803085327},{"id":"https://openalex.org/C28449271","wikidata":"https://www.wikidata.org/wiki/Q6667469","display_name":"Logic optimization","level":4,"score":0.45879244804382324},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.42848092317581177},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.35262033343315125},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.3223695158958435},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.32094040513038635},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2542179226875305},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2510479688644409},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.24143698811531067},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.23614326119422913},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.18686717748641968},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.09777626395225525},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2019.8702753","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2019.8702753","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.7599999904632568}],"awards":[],"funders":[{"id":"https://openalex.org/F4320338294","display_name":"Air Force Research Laboratory","ror":"https://ror.org/02e2egq70"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W2017164482","https://openalex.org/W2038454316","https://openalex.org/W2067523571","https://openalex.org/W2108598243","https://openalex.org/W2119144962","https://openalex.org/W2125203716","https://openalex.org/W2289252105","https://openalex.org/W2565851976","https://openalex.org/W2606722458","https://openalex.org/W2612445135","https://openalex.org/W2900228909","https://openalex.org/W2902593271","https://openalex.org/W2907477236","https://openalex.org/W2964299589","https://openalex.org/W4240168186","https://openalex.org/W4297775537","https://openalex.org/W6677580257","https://openalex.org/W6737664043"],"related_works":["https://openalex.org/W2039093878","https://openalex.org/W2135636985","https://openalex.org/W2127580684","https://openalex.org/W2120397377","https://openalex.org/W2992319512","https://openalex.org/W2548497727","https://openalex.org/W2107701025","https://openalex.org/W1816831194","https://openalex.org/W2182005210","https://openalex.org/W2943476754"],"abstract_inverted_index":{"We":[0,38,75],"present":[1,76],"a":[2,24,28],"building":[3,18,42],"block":[4,19,43],"architecture":[5],"for":[6,48,54,81],"systolic":[7,46,90],"array":[8],"3D-IC":[9,67],"implementations":[10,96],"of":[11,23,56],"convolutional":[12],"neural":[13],"network":[14],"(CNN)":[15],"inference.":[16],"The":[17],"can":[20,44],"be":[21],"part":[22],"library":[25],"offered":[26],"by":[27],"chip":[29],"design":[30],"service":[31],"provider":[32],"to":[33,102],"support":[34],"efficient":[35],"CNN":[36,52],"implementations.":[37,108],"describe":[39],"how":[40],"the":[41],"form":[45],"arrays":[47,91],"implementing":[49],"low-latency,":[50],"energy-efficient":[51],"inference":[53],"models":[55],"any":[57],"size,":[58,94],"while":[59],"incorporating":[60],"advanced":[61],"packaging":[62],"features":[63],"such":[64],"as":[65,89],"\u201clogic-on-logic\u201d":[66],"(micro-bump/TSV,":[68],"monolithic":[69],"3D":[70,73,84,95],"or":[71],"other":[72],"technology).":[74],"delay":[77],"and":[78,83,86],"power":[79],"analysis":[80],"2D":[82,107],"implementations,":[85],"argue":[87],"that":[88],"scale":[92],"in":[93],"based":[97],"on,":[98],"e.g.,":[99],"micro-bump/TSV,":[100],"lead":[101],"significant":[103],"performance":[104],"improvements":[105],"over":[106]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":6},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1}],"updated_date":"2026-03-13T16:22:10.518609","created_date":"2025-10-10T00:00:00"}
