{"id":"https://openalex.org/W2943735514","doi":"https://doi.org/10.1109/iscas.2019.8702487","title":"A 13-bit 180-MS/s SAR ADC with Efficient Capacitor-Mismatch Estimation and Dither Enhancement","display_name":"A 13-bit 180-MS/s SAR ADC with Efficient Capacitor-Mismatch Estimation and Dither Enhancement","publication_year":2019,"publication_date":"2019-05-01","ids":{"openalex":"https://openalex.org/W2943735514","doi":"https://doi.org/10.1109/iscas.2019.8702487","mag":"2943735514"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2019.8702487","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2019.8702487","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5025053306","display_name":"Fan Ye","orcid":"https://orcid.org/0000-0002-1089-1498"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Fan Ye","raw_affiliation_strings":["State Key Laboratory of ASIC and System, Fudan University, Shanghai, P. R. China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, Shanghai, P. R. China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100424136","display_name":"Shuai Li","orcid":"https://orcid.org/0000-0003-4593-7019"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shuai Li","raw_affiliation_strings":["State Key Laboratory of ASIC and System, Fudan University, Shanghai, P. R. China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, Shanghai, P. R. China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101638163","display_name":"Min Zhu","orcid":"https://orcid.org/0000-0002-8892-259X"},"institutions":[{"id":"https://openalex.org/I4210089056","display_name":"Beijing Microelectronics Technology Institute","ror":"https://ror.org/007y7ej30","country_code":"CN","type":"other","lineage":["https://openalex.org/I4210089056"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Min Zhu","raw_affiliation_strings":["Etown IP Microelectronic (Beijing) Co., Ltd"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Etown IP Microelectronic (Beijing) Co., Ltd","institution_ids":["https://openalex.org/I4210089056"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080735726","display_name":"Zekan Ni","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zekan Ni","raw_affiliation_strings":["State Key Laboratory of ASIC and System, Fudan University, Shanghai, P. R. China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, Shanghai, P. R. China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016448886","display_name":"Junyan Ren","orcid":"https://orcid.org/0000-0002-7799-6251"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Junyan Ren","raw_affiliation_strings":["State Key Laboratory of ASIC and System, Fudan University, Shanghai, P. R. China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, Shanghai, P. R. China","institution_ids":["https://openalex.org/I24943067"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.5982,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.64969101,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11472","display_name":"Analytical Chemistry and Sensors","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/1502","display_name":"Bioengineering"},"field":{"id":"https://openalex.org/fields/15","display_name":"Chemical Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dither","display_name":"Dither","score":0.9583200216293335},{"id":"https://openalex.org/keywords/spurious-free-dynamic-range","display_name":"Spurious-free dynamic range","score":0.8473328351974487},{"id":"https://openalex.org/keywords/successive-approximation-adc","display_name":"Successive approximation ADC","score":0.7792919874191284},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.6393044590950012},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5821141004562378},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5622849464416504},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5616536736488342},{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.4474605321884155},{"id":"https://openalex.org/keywords/bit","display_name":"Bit (key)","score":0.4435034394264221},{"id":"https://openalex.org/keywords/noise-shaping","display_name":"Noise shaping","score":0.2486521303653717},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19326943159103394},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.14687737822532654},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.08041378855705261}],"concepts":[{"id":"https://openalex.org/C70451592","wikidata":"https://www.wikidata.org/wiki/Q376493","display_name":"Dither","level":3,"score":0.9583200216293335},{"id":"https://openalex.org/C119293636","wikidata":"https://www.wikidata.org/wiki/Q657480","display_name":"Spurious-free dynamic range","level":3,"score":0.8473328351974487},{"id":"https://openalex.org/C60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","level":4,"score":0.7792919874191284},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.6393044590950012},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5821141004562378},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5622849464416504},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5616536736488342},{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.4474605321884155},{"id":"https://openalex.org/C117011727","wikidata":"https://www.wikidata.org/wiki/Q1278488","display_name":"Bit (key)","level":2,"score":0.4435034394264221},{"id":"https://openalex.org/C9083635","wikidata":"https://www.wikidata.org/wiki/Q2133535","display_name":"Noise shaping","level":2,"score":0.2486521303653717},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19326943159103394},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.14687737822532654},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.08041378855705261},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2019.8702487","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2019.8702487","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8199999928474426,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W2117432625","https://openalex.org/W2165630788","https://openalex.org/W2285437171","https://openalex.org/W2564345649","https://openalex.org/W2782303535"],"related_works":["https://openalex.org/W2359588884","https://openalex.org/W2082107524","https://openalex.org/W2904640696","https://openalex.org/W4390187725","https://openalex.org/W2752640128","https://openalex.org/W2278942241","https://openalex.org/W2568520569","https://openalex.org/W4206356469","https://openalex.org/W2345299457","https://openalex.org/W2942561789"],"abstract_inverted_index":{"A":[0,22,35,44],"13-bit":[1],"SAR":[2],"ADC":[3,57],"with":[4,58,73],"bridged":[5],"capacitor":[6],"array":[7],"is":[8,33,46],"implemented.":[9],"In":[10],"order":[11],"to":[12,18],"calibrate":[13],"the":[14,40,56],"weight":[15,23,30],"error":[16],"due":[17],"parasite":[19],"and":[20,26,68,78],"mismatch.":[21],"redundant":[24],"structure":[25],"a":[27,49],"one-by-one":[28],"foreground":[29],"estimate":[31],"scheme":[32],"proposed.":[34],"dithering":[36],"mode":[37],"can":[38],"improve":[39],"dynamic":[41],"performance":[42],"further.":[43],"prototype":[45],"fabricated":[47],"in":[48],"28nm":[50],"CMOS":[51],"technology.":[52],"The":[53],"measurement":[54],"of":[55,61,66,71],"conversion":[59],"rate":[60],"180MS/s":[62],"achieves":[63],"an":[64,69],"SFDR":[65],"79.1dBc":[67],"SNDR":[70],"64.3dBc,":[72],"remarkable":[74],"improvement":[75],"after":[76],"calibration":[77],"dither.":[79]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}