{"id":"https://openalex.org/W2943625592","doi":"https://doi.org/10.1109/iscas.2019.8702438","title":"Power and Data Integrity in Monolithic 3D Integrated SIMON Core","display_name":"Power and Data Integrity in Monolithic 3D Integrated SIMON Core","publication_year":2019,"publication_date":"2019-05-01","ids":{"openalex":"https://openalex.org/W2943625592","doi":"https://doi.org/10.1109/iscas.2019.8702438","mag":"2943625592"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2019.8702438","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2019.8702438","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5039709669","display_name":"Ivan Miketic","orcid":"https://orcid.org/0000-0003-4935-2640"},"institutions":[{"id":"https://openalex.org/I59553526","display_name":"Stony Brook University","ror":"https://ror.org/05qghxh33","country_code":"US","type":"education","lineage":["https://openalex.org/I59553526"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ivan Miketic","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Stony Brook University (SUNY), New York"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Stony Brook University (SUNY), New York","institution_ids":["https://openalex.org/I59553526"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5061262597","display_name":"Emre Salman","orcid":"https://orcid.org/0000-0001-6538-6803"},"institutions":[{"id":"https://openalex.org/I59553526","display_name":"Stony Brook University","ror":"https://ror.org/05qghxh33","country_code":"US","type":"education","lineage":["https://openalex.org/I59553526"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Emre Salman","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Stony Brook University (SUNY), New York"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Stony Brook University (SUNY), New York","institution_ids":["https://openalex.org/I59553526"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I59553526"],"apc_list":null,"apc_paid":null,"fwci":0.7965,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.62023414,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"2014","issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/core","display_name":"Core (optical fiber)","score":0.6220262050628662},{"id":"https://openalex.org/keywords/data-integrity","display_name":"Data integrity","score":0.5679525136947632},{"id":"https://openalex.org/keywords/power-integrity","display_name":"Power integrity","score":0.5506146550178528},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5154858231544495},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5036980509757996},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.3607861399650574},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22828486561775208},{"id":"https://openalex.org/keywords/signal-integrity","display_name":"Signal integrity","score":0.20923495292663574},{"id":"https://openalex.org/keywords/database","display_name":"Database","score":0.14553704857826233},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.13537555932998657},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.12456688284873962},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.1089409589767456},{"id":"https://openalex.org/keywords/printed-circuit-board","display_name":"Printed circuit board","score":0.07137119770050049}],"concepts":[{"id":"https://openalex.org/C2164484","wikidata":"https://www.wikidata.org/wiki/Q5170150","display_name":"Core (optical fiber)","level":2,"score":0.6220262050628662},{"id":"https://openalex.org/C33762810","wikidata":"https://www.wikidata.org/wiki/Q461671","display_name":"Data integrity","level":2,"score":0.5679525136947632},{"id":"https://openalex.org/C2777561913","wikidata":"https://www.wikidata.org/wiki/Q19599527","display_name":"Power integrity","level":4,"score":0.5506146550178528},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5154858231544495},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5036980509757996},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.3607861399650574},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22828486561775208},{"id":"https://openalex.org/C44938667","wikidata":"https://www.wikidata.org/wiki/Q4503810","display_name":"Signal integrity","level":3,"score":0.20923495292663574},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.14553704857826233},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.13537555932998657},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.12456688284873962},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.1089409589767456},{"id":"https://openalex.org/C120793396","wikidata":"https://www.wikidata.org/wiki/Q173350","display_name":"Printed circuit board","level":2,"score":0.07137119770050049},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2019.8702438","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2019.8702438","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1470618011","https://openalex.org/W1967540748","https://openalex.org/W1970105504","https://openalex.org/W1972367194","https://openalex.org/W1974392394","https://openalex.org/W1981823766","https://openalex.org/W2002806561","https://openalex.org/W2087928947","https://openalex.org/W2089979174","https://openalex.org/W2105103777","https://openalex.org/W2399532653","https://openalex.org/W2579431025","https://openalex.org/W2752483262","https://openalex.org/W2757604236","https://openalex.org/W2768265037","https://openalex.org/W2799886512","https://openalex.org/W6628666369","https://openalex.org/W6672645840","https://openalex.org/W6712540607"],"related_works":["https://openalex.org/W2351109918","https://openalex.org/W93493066","https://openalex.org/W2046797091","https://openalex.org/W2366817541","https://openalex.org/W2574617445","https://openalex.org/W2374141004","https://openalex.org/W1992148151","https://openalex.org/W2517839620","https://openalex.org/W1481563537","https://openalex.org/W2324631638"],"abstract_inverted_index":{"Monolithic":[0],"3D":[1,41,66,102,113],"ICs":[2],"have":[3],"vertical":[4,18],"interconnects":[5],"that":[6,107],"are":[7,50,59,74,125,131,139],"comparable":[8],"in":[9,36,78,133],"size":[10],"to":[11,127,144],"local":[12],"vias,":[13],"thereby":[14],"permitting":[15],"extremely":[16],"fine-grained":[17],"integration.":[19],"SIMON,":[20],"a":[21,71],"lightweight":[22],"block":[23],"cipher,":[24],"is":[25,97,105,115],"designed":[26],"and":[27,47,54,76,82,94],"characterized":[28,77],"at":[29],"the":[30,62,85,121,128,134],"Graphic":[31],"Database":[32],"System":[33],"(GDS)":[34],"level":[35],"two":[37,65],"types":[38],"of":[39,80,87,120],"monolithic":[40,88,112],"design":[42,114],"styles:":[43],"transistor-level,":[44],"where":[45,56,137],"nMOS":[46],"pMOS":[48,122],"transistors":[49,123],"split":[51],"between":[52],"tiers,":[53],"gate-level,":[55],"individual":[57],"gates":[58],"partitioned":[60],"among":[61],"tiers.":[63],"The":[64],"implementations":[67],"as":[68,70],"well":[69],"2D":[72],"implementation":[73],"compared":[75],"terms":[79],"area":[81],"power.":[83],"Furthermore,":[84],"effect":[86],"intertier":[89],"vias":[90],"(MIVs)":[91],"on":[92],"power":[93,108],"data":[95],"integrity":[96],"analyzed":[98],"for":[99,110],"each":[100],"custom":[101],"design.":[103],"It":[104],"shown":[106],"delivery":[109],"transistor-level":[111],"more":[116],"challenging":[117],"since":[118],"all":[119],"(that":[124],"connected":[126],"supply":[129],"voltage)":[130],"located":[132],"bottom":[135],"tier":[136],"there":[138],"limited":[140],"metal":[141],"resources":[142],"due":[143],"technology":[145],"constraints.":[146]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
