{"id":"https://openalex.org/W2943018702","doi":"https://doi.org/10.1109/iscas.2019.8702313","title":"Analysis of Timing Error Due to Supply and Substrate Noise in an Inverter Based High-Speed Comparator","display_name":"Analysis of Timing Error Due to Supply and Substrate Noise in an Inverter Based High-Speed Comparator","publication_year":2019,"publication_date":"2019-05-01","ids":{"openalex":"https://openalex.org/W2943018702","doi":"https://doi.org/10.1109/iscas.2019.8702313","mag":"2943018702"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2019.8702313","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2019.8702313","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5086212713","display_name":"Vijender Kumar Sharma","orcid":"https://orcid.org/0000-0001-6375-0237"},"institutions":[{"id":"https://openalex.org/I9579091","display_name":"Indian Institute of Technology Mandi","ror":"https://ror.org/05r9r2f34","country_code":"IN","type":"education","lineage":["https://openalex.org/I9579091"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Vijender Kumar Sharma","raw_affiliation_strings":["Indian Institute of Technology, Mandi, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology, Mandi, India","institution_ids":["https://openalex.org/I9579091"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109422621","display_name":"B. Dinesh Kumar","orcid":null},"institutions":[{"id":"https://openalex.org/I9579091","display_name":"Indian Institute of Technology Mandi","ror":"https://ror.org/05r9r2f34","country_code":"IN","type":"education","lineage":["https://openalex.org/I9579091"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"B. Dinesh Kumar","raw_affiliation_strings":["Indian Institute of Technology, Mandi, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology, Mandi, India","institution_ids":["https://openalex.org/I9579091"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5024712354","display_name":"Muhammed Suhail Illikkal","orcid":null},"institutions":[{"id":"https://openalex.org/I9579091","display_name":"Indian Institute of Technology Mandi","ror":"https://ror.org/05r9r2f34","country_code":"IN","type":"education","lineage":["https://openalex.org/I9579091"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Muhammed Suhail Illikkal","raw_affiliation_strings":["Indian Institute of Technology, Mandi, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology, Mandi, India","institution_ids":["https://openalex.org/I9579091"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083364512","display_name":"Jai Narayan Tripathi","orcid":"https://orcid.org/0000-0001-9109-2948"},"institutions":[{"id":"https://openalex.org/I4210094169","display_name":"STMicroelectronics (India)","ror":"https://ror.org/00ft7bw25","country_code":"IN","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210094169"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Jai Narayan Tripathi","raw_affiliation_strings":["STMicroelctronics, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"STMicroelctronics, India","institution_ids":["https://openalex.org/I4210094169"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005997617","display_name":"Navneet Gupta","orcid":"https://orcid.org/0000-0001-8103-0241"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Navneet Gupta","raw_affiliation_strings":["Minima Processor Oy, Espoo, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Minima Processor Oy, Espoo, Finland","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5070274082","display_name":"Hitesh Shrimali","orcid":"https://orcid.org/0000-0003-2776-1005"},"institutions":[{"id":"https://openalex.org/I9579091","display_name":"Indian Institute of Technology Mandi","ror":"https://ror.org/05r9r2f34","country_code":"IN","type":"education","lineage":["https://openalex.org/I9579091"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Hitesh Shrimali","raw_affiliation_strings":["Indian Institute of Technology, Mandi, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology, Mandi, India","institution_ids":["https://openalex.org/I9579091"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.8889600038528442},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.7828003168106079},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7202205061912537},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6607465744018555},{"id":"https://openalex.org/keywords/inverter","display_name":"Inverter","score":0.6349881887435913},{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.5934369564056396},{"id":"https://openalex.org/keywords/biasing","display_name":"Biasing","score":0.5606938600540161},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5008304119110107},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.483194500207901},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.48226386308670044},{"id":"https://openalex.org/keywords/admittance","display_name":"Admittance","score":0.4566478133201599},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.44208812713623047},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3498240113258362},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3138270974159241},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2620270550251007},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.15048223733901978},{"id":"https://openalex.org/keywords/electrical-impedance","display_name":"Electrical impedance","score":0.08363884687423706}],"concepts":[{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.8889600038528442},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.7828003168106079},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7202205061912537},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6607465744018555},{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.6349881887435913},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.5934369564056396},{"id":"https://openalex.org/C20254490","wikidata":"https://www.wikidata.org/wiki/Q719550","display_name":"Biasing","level":3,"score":0.5606938600540161},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5008304119110107},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.483194500207901},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.48226386308670044},{"id":"https://openalex.org/C108811297","wikidata":"https://www.wikidata.org/wiki/Q214518","display_name":"Admittance","level":3,"score":0.4566478133201599},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.44208812713623047},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3498240113258362},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3138270974159241},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2620270550251007},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.15048223733901978},{"id":"https://openalex.org/C17829176","wikidata":"https://www.wikidata.org/wiki/Q179043","display_name":"Electrical impedance","level":2,"score":0.08363884687423706},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2019.8702313","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2019.8702313","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8399999737739563,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":28,"referenced_works":["https://openalex.org/W1565658248","https://openalex.org/W1566389893","https://openalex.org/W1593525474","https://openalex.org/W1658809881","https://openalex.org/W1910994867","https://openalex.org/W1968632892","https://openalex.org/W1979902309","https://openalex.org/W2015794844","https://openalex.org/W2028828529","https://openalex.org/W2088115909","https://openalex.org/W2094024001","https://openalex.org/W2097913753","https://openalex.org/W2098175786","https://openalex.org/W2110836823","https://openalex.org/W2161268877","https://openalex.org/W2294646927","https://openalex.org/W2513230460","https://openalex.org/W2515488824","https://openalex.org/W2587931883","https://openalex.org/W2593789750","https://openalex.org/W2732841385","https://openalex.org/W2737659977","https://openalex.org/W2767103410","https://openalex.org/W2884423436","https://openalex.org/W2895676248","https://openalex.org/W2901213684","https://openalex.org/W2928016405","https://openalex.org/W6754754843"],"related_works":["https://openalex.org/W2034349229","https://openalex.org/W2204879205","https://openalex.org/W4366783034","https://openalex.org/W1972415042","https://openalex.org/W2096437374","https://openalex.org/W4313221225","https://openalex.org/W2150642609","https://openalex.org/W2005410346","https://openalex.org/W2107551409","https://openalex.org/W4249541960"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"the":[3,20,29,33,59,81],"timing":[4],"error":[5,89],"and":[6,32,39,83],"power":[7,49],"supply":[8,50],"induced":[9],"jitter":[10],"(PSIJ)":[11],"analyses":[12],"of":[13,22,51,58,86],"an":[14,78],"inverter":[15],"based":[16],"high-speed":[17],"comparator,":[18],"including":[19,61],"design":[21],"common-mode":[23],"body":[24],"biasing":[25,62],"feedback":[26],"circuitry.":[27],"Both":[28],"main":[30],"circuit":[31],"supporting":[34],"circuitry":[35],"have":[36],"been":[37],"designed":[38],"implemented":[40],"in":[41,65],"a":[42],"standard":[43],"28":[44],"nm":[45],"CMOS":[46],"technology":[47],"with":[48,80],"0.9":[52],"V.":[53],"The":[54,74],"closed-form":[55],"transfer":[56],"function":[57],"comparator":[60],"circuitry,":[63],"used":[64],"PSIJ":[66],"analysis,":[67],"is":[68],"derived":[69],"using":[70],"symbolic":[71],"admittance":[72],"method.":[73],"mathematical":[75],"model":[76],"shows":[77],"agreement":[79],"simulation":[82],"exhibits":[84],"7.4%":[85],"mean":[87],"percentage":[88],"(MPE).":[90]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":3}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}