{"id":"https://openalex.org/W2942814414","doi":"https://doi.org/10.1109/iscas.2019.8702295","title":"Design of Pre-Emphasis Pulses for Large Memory Arrays with Minimal Word-Line Delay Time","display_name":"Design of Pre-Emphasis Pulses for Large Memory Arrays with Minimal Word-Line Delay Time","publication_year":2019,"publication_date":"2019-05-01","ids":{"openalex":"https://openalex.org/W2942814414","doi":"https://doi.org/10.1109/iscas.2019.8702295","mag":"2942814414"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2019.8702295","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2019.8702295","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://shizuoka.repo.nii.ac.jp/record/11499/files/190509001.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5079744649","display_name":"Kosuke Matsuyama","orcid":null},"institutions":[{"id":"https://openalex.org/I1298590031","display_name":"Shizuoka University","ror":"https://ror.org/01w6wtk13","country_code":"JP","type":"education","lineage":["https://openalex.org/I1298590031"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Kazuki Matsuyama","raw_affiliation_strings":["Shizuoka University, Hamamatsu, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Shizuoka University, Hamamatsu, Japan","institution_ids":["https://openalex.org/I1298590031"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5066755966","display_name":"T\u00f4ru Tanzawa","orcid":"https://orcid.org/0000-0001-8228-2520"},"institutions":[{"id":"https://openalex.org/I1298590031","display_name":"Shizuoka University","ror":"https://ror.org/01w6wtk13","country_code":"JP","type":"education","lineage":["https://openalex.org/I1298590031"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Toru Tanzawa","raw_affiliation_strings":["Shizuoka University, Hamamatsu, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Shizuoka University, Hamamatsu, Japan","institution_ids":["https://openalex.org/I1298590031"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I1298590031"],"apc_list":null,"apc_paid":null,"fwci":1.969,"has_fulltext":true,"cited_by_count":5,"citation_normalized_percentile":{"value":0.84414131,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":"51","issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/emphasis","display_name":"Emphasis (telecommunications)","score":0.8785784244537354},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7135963439941406},{"id":"https://openalex.org/keywords/word","display_name":"Word (group theory)","score":0.5750390291213989},{"id":"https://openalex.org/keywords/line","display_name":"Line (geometry)","score":0.5622696876525879},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.19727465510368347},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.07246491312980652}],"concepts":[{"id":"https://openalex.org/C177454536","wikidata":"https://www.wikidata.org/wiki/Q578290","display_name":"Emphasis (telecommunications)","level":2,"score":0.8785784244537354},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7135963439941406},{"id":"https://openalex.org/C90805587","wikidata":"https://www.wikidata.org/wiki/Q10944557","display_name":"Word (group theory)","level":2,"score":0.5750390291213989},{"id":"https://openalex.org/C198352243","wikidata":"https://www.wikidata.org/wiki/Q37105","display_name":"Line (geometry)","level":2,"score":0.5622696876525879},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.19727465510368347},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.07246491312980652},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/iscas.2019.8702295","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2019.8702295","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},{"id":"pmh:oai:irdb.nii.ac.jp:00984:0004028449","is_oa":true,"landing_page_url":"https://shizuoka.repo.nii.ac.jp/records/11499","pdf_url":"https://shizuoka.repo.nii.ac.jp/record/11499/files/190509001.pdf","source":{"id":"https://openalex.org/S7407056385","display_name":"Institutional Repositories DataBase (IRDB)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I184597095","host_organization_name":"National Institute of Informatics","host_organization_lineage":["https://openalex.org/I184597095"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"2019 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"conference paper"}],"best_oa_location":{"id":"pmh:oai:irdb.nii.ac.jp:00984:0004028449","is_oa":true,"landing_page_url":"https://shizuoka.repo.nii.ac.jp/records/11499","pdf_url":"https://shizuoka.repo.nii.ac.jp/record/11499/files/190509001.pdf","source":{"id":"https://openalex.org/S7407056385","display_name":"Institutional Repositories DataBase (IRDB)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I184597095","host_organization_name":"National Institute of Informatics","host_organization_lineage":["https://openalex.org/I184597095"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"2019 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"conference paper"},"sustainable_development_goals":[{"score":0.6299999952316284,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320306431","display_name":"Micron Foundation","ror":"https://ror.org/02fv52296"}],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2942814414.pdf","grobid_xml":"https://content.openalex.org/works/W2942814414.grobid-xml"},"referenced_works_count":6,"referenced_works":["https://openalex.org/W1984588379","https://openalex.org/W2082603453","https://openalex.org/W2108368155","https://openalex.org/W2221186049","https://openalex.org/W2292764753","https://openalex.org/W2587193712"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W2055105357","https://openalex.org/W2153819599","https://openalex.org/W2255426644","https://openalex.org/W2072124641","https://openalex.org/W2167093538","https://openalex.org/W2018956713","https://openalex.org/W2081479354","https://openalex.org/W2166972143","https://openalex.org/W2113107605"],"abstract_inverted_index":{"This":[0],"paper":[1],"formulates":[2],"minimal":[3],"word-line":[4],"(WL)":[5],"delay":[6],"time":[7],"with":[8,35,43],"pre-emphasis":[9],"pulses":[10],"to":[11],"design":[12],"the":[13,20],"pulse":[14],"width":[15],"as":[16,28,71],"a":[17,36,59],"function":[18],"of":[19,39,63,75],"overdrive":[21],"voltage":[22],"for":[23,46],"large":[24],"memory":[25],"arrays":[26],"such":[27],"3D":[29],"NAND.":[30],"The":[31,55,73],"theory":[32,56],"is":[33],"validated":[34],"nominal":[37],"error":[38],"5%":[40],"in":[41,78],"comparison":[42],"SPICE":[44],"simulation":[45],"single":[47],"WL":[48,52,64,79],"line":[49,53],"and":[50,66,80],"three":[51],"models.":[54],"can":[57],"take":[58],"finite":[60],"series":[61],"resistance":[62],"driver":[65],"decoding":[67],"transistors":[68],"into":[69],"consideration":[70],"well.":[72],"impact":[74],"RC":[76],"variation":[77],"its":[81],"compensation":[82],"method":[83],"are":[84],"also":[85],"discussed.":[86]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1}],"updated_date":"2026-08-21T09:56:20.448147","created_date":"2025-10-10T00:00:00"}
