{"id":"https://openalex.org/W2943785906","doi":"https://doi.org/10.1109/iscas.2019.8702084","title":"EA-Based Refactoring of Mapped Logic Circuits","display_name":"EA-Based Refactoring of Mapped Logic Circuits","publication_year":2019,"publication_date":"2019-05-01","ids":{"openalex":"https://openalex.org/W2943785906","doi":"https://doi.org/10.1109/iscas.2019.8702084","mag":"2943785906"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2019.8702084","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2019.8702084","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5055294430","display_name":"Jitka Kocnova","orcid":null},"institutions":[{"id":"https://openalex.org/I60587646","display_name":"Brno University of Technology","ror":"https://ror.org/03613d656","country_code":"CZ","type":"education","lineage":["https://openalex.org/I60587646"]}],"countries":["CZ"],"is_corresponding":false,"raw_author_name":"Jitka Kocnova","raw_affiliation_strings":["Faculty of Information Technology, Brno University of Technology, Brno, Czech Republic"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Information Technology, Brno University of Technology, Brno, Czech Republic","institution_ids":["https://openalex.org/I60587646"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5086941203","display_name":"Zden\u011bk Va\u0161\u00ed\u010dek","orcid":"https://orcid.org/0000-0002-2279-5217"},"institutions":[{"id":"https://openalex.org/I60587646","display_name":"Brno University of Technology","ror":"https://ror.org/03613d656","country_code":"CZ","type":"education","lineage":["https://openalex.org/I60587646"]}],"countries":["CZ"],"is_corresponding":false,"raw_author_name":"Zdenek Vasicek","raw_affiliation_strings":["Faculty of Information Technology, Brno University of Technology, Brno, Czech Republic"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Information Technology, Brno University of Technology, Brno, Czech Republic","institution_ids":["https://openalex.org/I60587646"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I60587646"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.03397402,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/code-refactoring","display_name":"Code refactoring","score":0.6954156160354614},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.649789571762085},{"id":"https://openalex.org/keywords/logic-optimization","display_name":"Logic optimization","score":0.5990293622016907},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.570554256439209},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.5530086159706116},{"id":"https://openalex.org/keywords/heuristic","display_name":"Heuristic","score":0.5397298336029053},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5282042622566223},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.48916152119636536},{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.4578782916069031},{"id":"https://openalex.org/keywords/metric","display_name":"Metric (unit)","score":0.4508225917816162},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.4186386466026306},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.40221256017684937},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.2236044704914093},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.18911784887313843},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.14078441262245178},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.10093078017234802},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09240326285362244}],"concepts":[{"id":"https://openalex.org/C152752567","wikidata":"https://www.wikidata.org/wiki/Q116877","display_name":"Code refactoring","level":3,"score":0.6954156160354614},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.649789571762085},{"id":"https://openalex.org/C28449271","wikidata":"https://www.wikidata.org/wiki/Q6667469","display_name":"Logic optimization","level":4,"score":0.5990293622016907},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.570554256439209},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.5530086159706116},{"id":"https://openalex.org/C173801870","wikidata":"https://www.wikidata.org/wiki/Q201413","display_name":"Heuristic","level":2,"score":0.5397298336029053},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5282042622566223},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.48916152119636536},{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.4578782916069031},{"id":"https://openalex.org/C176217482","wikidata":"https://www.wikidata.org/wiki/Q860554","display_name":"Metric (unit)","level":2,"score":0.4508225917816162},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.4186386466026306},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.40221256017684937},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.2236044704914093},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.18911784887313843},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.14078441262245178},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.10093078017234802},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09240326285362244},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2019.8702084","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2019.8702084","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.5400000214576721,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320321006","display_name":"Grantov\u00e1 Agentura \u010cesk\u00e9 Republiky","ror":"https://ror.org/01pv73b02"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W35668030","https://openalex.org/W642321910","https://openalex.org/W1775913388","https://openalex.org/W1776822698","https://openalex.org/W1984163270","https://openalex.org/W1995135231","https://openalex.org/W2007765940","https://openalex.org/W2026415522","https://openalex.org/W2056693747","https://openalex.org/W2100465945","https://openalex.org/W2130049777","https://openalex.org/W2757078730","https://openalex.org/W6601412428"],"related_works":["https://openalex.org/W1939541994","https://openalex.org/W1966764473","https://openalex.org/W818963952","https://openalex.org/W2018106661","https://openalex.org/W2039140951","https://openalex.org/W2072840391","https://openalex.org/W2107594749","https://openalex.org/W2157277696","https://openalex.org/W4242010157","https://openalex.org/W1591214607"],"abstract_inverted_index":{"The":[0],"increasing":[1],"complexity":[2],"of":[3,9,56,61,72,112,134,142],"the":[4,40,59,82,121,135,163,169],"designs":[5],"and":[6,23,48,116,145],"problematic":[7],"scalability":[8],"original":[10,122],"representations":[11,18,26],"led":[12],"to":[13,63,77,120,162],"a":[14,140,151],"shift":[15],"in":[16,20,130,154,159],"internal":[17],"used":[19],"logic":[21,46,73,83],"synthesis":[22,172],"optimization.":[24],"Heterogeneous":[25],"were":[27,52],"replaced":[28],"with":[29,69],"homogeneous":[30],"intermediate":[31],"representations.":[32],"And-inverter":[33],"graph":[34],"(AIG)":[35],"has":[36,91],"been":[37,92],"identified":[38],"as":[39],"most":[41],"promising":[42],"structure":[43,123],"for":[44,182],"scalable":[45],"optimization":[47,74,98],"many":[49],"efficient":[50],"algorithms":[51,75],"implemented":[53],"on":[54,101,139],"top":[55],"it.":[57],"However,":[58],"inability":[60],"AIG":[62],"efficiently":[64],"represent":[65],"XOR":[66],"gates":[67],"together":[68],"heuristic":[70],"nature":[71],"leads":[76],"some":[78,131],"inefficiency":[79],"causing":[80],"that":[81,125,150],"can":[84,156],"be":[85,157],"further":[86],"minimized":[87],"even":[88],"after":[89],"it":[90],"mapped.":[93],"This":[94],"paper":[95],"presents":[96],"an":[97,128],"technique":[99],"based":[100],"refactoring":[102],"targeting":[103],"mapped":[104],"combinational":[105],"circuits.":[106,184],"It":[107],"iteratively":[108],"selects":[109],"large":[110],"cones":[111],"logic,":[113],"optimizes":[114],"them":[115,118],"returns":[117],"back":[119],"provided":[124],"there":[126],"is":[127,137],"improvement":[129],"metric.":[132],"Performance":[133],"method":[136],"evaluated":[138],"set":[141],"complex":[143],"academic":[144,170],"industrial":[146],"benchmarks.":[147],"We":[148],"show":[149],"9.2%":[152],"reduction":[153,179],"area":[155],"achieved":[158],"average":[160],"compared":[161],"highly":[164],"optimized":[165],"results":[166],"obtained":[167],"using":[168],"state-of-the-art":[171],"tool.":[173],"In":[174],"average,":[175],"more":[176],"than":[177],"14%":[178],"was":[180],"observed":[181],"arithmetic":[183]},"counts_by_year":[{"year":2026,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
