{"id":"https://openalex.org/W2802246653","doi":"https://doi.org/10.1109/iscas.2018.8351692","title":"A Single-Stage Current-Mode Active Rectifier with Accurate Output-Current Regulation for IoT","display_name":"A Single-Stage Current-Mode Active Rectifier with Accurate Output-Current Regulation for IoT","publication_year":2018,"publication_date":"2018-01-01","ids":{"openalex":"https://openalex.org/W2802246653","doi":"https://doi.org/10.1109/iscas.2018.8351692","mag":"2802246653"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2018.8351692","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2018.8351692","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5065429444","display_name":"Fangyu Mao","orcid":"https://orcid.org/0000-0003-4115-6012"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Fangyu Mao","raw_affiliation_strings":["State Key Laboratory of Analog and Mixed-Signal VLSL, University of Macau, Macao, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Analog and Mixed-Signal VLSL, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071025160","display_name":"Yan L\u00fc","orcid":"https://orcid.org/0000-0001-9273-7576"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Yan Lu","raw_affiliation_strings":["State Key Laboratory of Analog and Mixed-Signal VLSL, University of Macau, Macao, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Analog and Mixed-Signal VLSL, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067466425","display_name":"Jie Lin","orcid":"https://orcid.org/0000-0002-1777-6898"},"institutions":[{"id":"https://openalex.org/I3045169105","display_name":"Southern University of Science and Technology","ror":"https://ror.org/049tv2d57","country_code":"CN","type":"education","lineage":["https://openalex.org/I3045169105"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jie Lin","raw_affiliation_strings":["Southern University of Science and Technology, Shenzhen, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Southern University of Science and Technology, Shenzhen, China","institution_ids":["https://openalex.org/I3045169105"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029241233","display_name":"Chenchang Zhan","orcid":"https://orcid.org/0000-0002-4878-4655"},"institutions":[{"id":"https://openalex.org/I3045169105","display_name":"Southern University of Science and Technology","ror":"https://ror.org/049tv2d57","country_code":"CN","type":"education","lineage":["https://openalex.org/I3045169105"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Chenchang Zhan","raw_affiliation_strings":["Southern University of Science and Technology, Shenzhen, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Southern University of Science and Technology, Shenzhen, China","institution_ids":["https://openalex.org/I3045169105"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5061042931","display_name":"U Seng\u2010Pan","orcid":null},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"U. Seng-Pan","raw_affiliation_strings":["State Key Laboratory of Analog and Mixed-Signal VLSL, University of Macau, Macao, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Analog and Mixed-Signal VLSL, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5106943352","display_name":"Rui P. Martins","orcid":"https://orcid.org/0000-0003-2821-648X"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Rui P. Martins","raw_affiliation_strings":["State Key Laboratory of Analog and Mixed-Signal VLSL, University of Macau, Macao, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Analog and Mixed-Signal VLSL, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.6547,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.70714961,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11249","display_name":"Wireless Power Transfer Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11249","display_name":"Wireless Power Transfer Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11392","display_name":"Energy Harvesting in Wireless Networks","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11230","display_name":"Innovative Energy Harvesting Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2210","display_name":"Mechanical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/nmos-logic","display_name":"NMOS logic","score":0.7016909122467041},{"id":"https://openalex.org/keywords/rectifier","display_name":"Rectifier (neural networks)","score":0.6460282802581787},{"id":"https://openalex.org/keywords/current-mirror","display_name":"Current mirror","score":0.6444980502128601},{"id":"https://openalex.org/keywords/pmos-logic","display_name":"PMOS logic","score":0.56102454662323},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.537423849105835},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5278406143188477},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5190309286117554},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5099929571151733},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4884442389011383},{"id":"https://openalex.org/keywords/current","display_name":"Current (fluid)","score":0.4870360493659973},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.4700416922569275},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.44130054116249084},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.30374109745025635}],"concepts":[{"id":"https://openalex.org/C197162436","wikidata":"https://www.wikidata.org/wiki/Q83908","display_name":"NMOS logic","level":4,"score":0.7016909122467041},{"id":"https://openalex.org/C50100734","wikidata":"https://www.wikidata.org/wiki/Q7303176","display_name":"Rectifier (neural networks)","level":5,"score":0.6460282802581787},{"id":"https://openalex.org/C173966970","wikidata":"https://www.wikidata.org/wiki/Q786012","display_name":"Current mirror","level":4,"score":0.6444980502128601},{"id":"https://openalex.org/C27050352","wikidata":"https://www.wikidata.org/wiki/Q173605","display_name":"PMOS logic","level":4,"score":0.56102454662323},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.537423849105835},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5278406143188477},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5190309286117554},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5099929571151733},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4884442389011383},{"id":"https://openalex.org/C148043351","wikidata":"https://www.wikidata.org/wiki/Q4456944","display_name":"Current (fluid)","level":2,"score":0.4870360493659973},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.4700416922569275},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.44130054116249084},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.30374109745025635},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.0},{"id":"https://openalex.org/C86582703","wikidata":"https://www.wikidata.org/wiki/Q7617824","display_name":"Stochastic neural network","level":4,"score":0.0},{"id":"https://openalex.org/C147168706","wikidata":"https://www.wikidata.org/wiki/Q1457734","display_name":"Recurrent neural network","level":3,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2018.8351692","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2018.8351692","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W2025411433","https://openalex.org/W2095290963","https://openalex.org/W2245645296","https://openalex.org/W2591078955","https://openalex.org/W2591837460","https://openalex.org/W2594520555","https://openalex.org/W2751383512"],"related_works":["https://openalex.org/W4386261925","https://openalex.org/W2048420745","https://openalex.org/W2082944690","https://openalex.org/W2263373136","https://openalex.org/W1914349328","https://openalex.org/W1811213809","https://openalex.org/W2160067645","https://openalex.org/W2023334077","https://openalex.org/W2005494397","https://openalex.org/W2104885411"],"abstract_inverted_index":{"This":[0,105],"paper":[1],"presents":[2],"a":[3,8,32,57,77,82,116,123,130],"single-stage":[4,106],"wireless":[5,19,107],"charger":[6,108],"using":[7],"current-mode":[9],"active":[10],"rectifier":[11,25],"with":[12,45,63,145],"accurate":[13],"output":[14,34,147],"current":[15,35,53,101,126],"regulation":[16,127],"for":[17],"efficient":[18],"charging.":[20],"As":[21],"we":[22],"know,":[23],"the":[24,64,91,94,99],"processes":[26],"an":[27],"AC":[28],"input":[29],"voltage/current":[30],"and":[31,48,81,112],"pulsing":[33],"which":[36],"are":[37],"difficult":[38],"to":[39,134],"be":[40],"accurately":[41],"sensed":[42],"on":[43],"chip":[44],"small":[46,72,78],"area":[47],"power":[49,66,95],"overheads.":[50],"The":[51,138],"proposed":[52],"sensing":[54,59,74],"technique":[55],"uses":[56],"replica":[58,84],"stage":[60],"in":[61,115],"parallel":[62],"main":[65],"stage.":[67],"It":[68],"consists":[69],"of":[70,93,141],"two":[71],"cross-connected":[73],"PMOS":[75],"transistors,":[76],"filtering":[79],"capacitor,":[80],"dynamic":[83],"load.":[85],"In":[86],"addition,":[87],"by":[88],"adaptively":[89],"tuning":[90],"delay":[92],"NMOS":[96],"driving":[97],"signal,":[98],"charging":[100],"is":[102,113,143],"regulated":[103],"precisely.":[104],"operates":[109],"at":[110],"6.78MHz,":[111],"designed":[114],"0.35\u03bcm":[117],"CMOS":[118],"process.":[119],"Simulation":[120],"results":[121],"show":[122],"minimum":[124],"97.5%":[125],"accuracy":[128],"over":[129],"10\u00d7":[131],"(from":[132],"100mA":[133],"1A)":[135],"output-current":[136],"range.":[137],"peak":[139],"efficiency":[140],"94%":[142],"achieved":[144],"4.2W":[146],"power.":[148]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}