{"id":"https://openalex.org/W2800717486","doi":"https://doi.org/10.1109/iscas.2018.8351375","title":"Nonvolatile Lookup Table Design Based on Ferroelectric Field-Effect Transistors","display_name":"Nonvolatile Lookup Table Design Based on Ferroelectric Field-Effect Transistors","publication_year":2018,"publication_date":"2018-01-01","ids":{"openalex":"https://openalex.org/W2800717486","doi":"https://doi.org/10.1109/iscas.2018.8351375","mag":"2800717486"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2018.8351375","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2018.8351375","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100373745","display_name":"Xiaohong Chen","orcid":"https://orcid.org/0000-0002-9797-8384"},"institutions":[{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"funder","lineage":["https://openalex.org/I19820366"]},{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Xiaoming Chen","raw_affiliation_strings":["Chinese Academy of Sciences, Institute of Computing Technology, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Chinese Academy of Sciences, Institute of Computing Technology, Beijing, China","institution_ids":["https://openalex.org/I4210090176","https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003032564","display_name":"Michael Niemier","orcid":"https://orcid.org/0000-0001-7776-4306"},"institutions":[{"id":"https://openalex.org/I107639228","display_name":"University of Notre Dame","ror":"https://ror.org/00mkhxb43","country_code":"US","type":"education","lineage":["https://openalex.org/I107639228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Michael Niemier","raw_affiliation_strings":["Department of Computer Science and Engineering, University of Notre Dame, Notre Dame, IN, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, University of Notre Dame, Notre Dame, IN, USA","institution_ids":["https://openalex.org/I107639228"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100600905","display_name":"Xiaobo Sharon Hu","orcid":"https://orcid.org/0000-0002-6636-9738"},"institutions":[{"id":"https://openalex.org/I107639228","display_name":"University of Notre Dame","ror":"https://ror.org/00mkhxb43","country_code":"US","type":"education","lineage":["https://openalex.org/I107639228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xiaobo Sharon Hu","raw_affiliation_strings":["Department of Computer Science and Engineering, University of Notre Dame, Notre Dame, IN, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, University of Notre Dame, Notre Dame, IN, USA","institution_ids":["https://openalex.org/I107639228"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5100373745"],"corresponding_institution_ids":["https://openalex.org/I19820366","https://openalex.org/I4210090176"],"apc_list":null,"apc_paid":null,"fwci":0.9013,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.7558366,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9969000220298767,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.7217974066734314},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.6983920931816101},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6102406978607178},{"id":"https://openalex.org/keywords/programmable-logic-device","display_name":"Programmable logic device","score":0.5441348552703857},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.495458722114563},{"id":"https://openalex.org/keywords/ferroelectric-ram","display_name":"Ferroelectric RAM","score":0.47186988592147827},{"id":"https://openalex.org/keywords/table","display_name":"Table (database)","score":0.46709081530570984},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4581649899482727},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4570879638195038},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.4553230106830597},{"id":"https://openalex.org/keywords/random-access","display_name":"Random access","score":0.41957712173461914},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.41029980778694153},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4043103754520416},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.36602699756622314},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.34392982721328735},{"id":"https://openalex.org/keywords/ferroelectricity","display_name":"Ferroelectricity","score":0.3294779062271118},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21844691038131714},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.11440753936767578},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.07984986901283264},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.07980543375015259}],"concepts":[{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.7217974066734314},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.6983920931816101},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6102406978607178},{"id":"https://openalex.org/C206274596","wikidata":"https://www.wikidata.org/wiki/Q1063837","display_name":"Programmable logic device","level":2,"score":0.5441348552703857},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.495458722114563},{"id":"https://openalex.org/C161164327","wikidata":"https://www.wikidata.org/wiki/Q703656","display_name":"Ferroelectric RAM","level":4,"score":0.47186988592147827},{"id":"https://openalex.org/C45235069","wikidata":"https://www.wikidata.org/wiki/Q278425","display_name":"Table (database)","level":2,"score":0.46709081530570984},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4581649899482727},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4570879638195038},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.4553230106830597},{"id":"https://openalex.org/C101722063","wikidata":"https://www.wikidata.org/wiki/Q218825","display_name":"Random access","level":2,"score":0.41957712173461914},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.41029980778694153},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4043103754520416},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.36602699756622314},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.34392982721328735},{"id":"https://openalex.org/C79090758","wikidata":"https://www.wikidata.org/wiki/Q1045739","display_name":"Ferroelectricity","level":3,"score":0.3294779062271118},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21844691038131714},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.11440753936767578},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.07984986901283264},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.07980543375015259},{"id":"https://openalex.org/C133386390","wikidata":"https://www.wikidata.org/wiki/Q184996","display_name":"Dielectric","level":2,"score":0.0},{"id":"https://openalex.org/C124101348","wikidata":"https://www.wikidata.org/wiki/Q172491","display_name":"Data mining","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2018.8351375","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2018.8351375","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8500000238418579}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":30,"referenced_works":["https://openalex.org/W1659899794","https://openalex.org/W1983547683","https://openalex.org/W1987850127","https://openalex.org/W2016106189","https://openalex.org/W2030765577","https://openalex.org/W2053511813","https://openalex.org/W2056251131","https://openalex.org/W2071950419","https://openalex.org/W2078401681","https://openalex.org/W2082948609","https://openalex.org/W2088797290","https://openalex.org/W2089356732","https://openalex.org/W2116513702","https://openalex.org/W2143161037","https://openalex.org/W2154202245","https://openalex.org/W2164567793","https://openalex.org/W2169033838","https://openalex.org/W2282422464","https://openalex.org/W2342750693","https://openalex.org/W2407647853","https://openalex.org/W2492987453","https://openalex.org/W2515187322","https://openalex.org/W2515432102","https://openalex.org/W2537444166","https://openalex.org/W2550053401","https://openalex.org/W2583357209","https://openalex.org/W2585010444","https://openalex.org/W2613103714","https://openalex.org/W2620977911","https://openalex.org/W4243796480"],"related_works":["https://openalex.org/W4401176878","https://openalex.org/W3013792460","https://openalex.org/W2994343469","https://openalex.org/W1511802890","https://openalex.org/W1905312773","https://openalex.org/W2808864279","https://openalex.org/W3105918491","https://openalex.org/W2125609625","https://openalex.org/W2972060505","https://openalex.org/W1565986912"],"abstract_inverted_index":{"As":[0],"a":[1,47,54],"nonvolatile":[2],"(NV)":[3],"device,":[4],"ferroelectric":[5],"field-effect":[6],"transistors":[7],"(FeFETs)":[8],"have":[9,37],"the":[10,85],"potential":[11],"to":[12,31],"reduced":[13],"power":[14,65],"and":[15,66,72,78],"area":[16],"by":[17],"integrating":[18],"NV":[19,106],"storage":[20,55],"elements":[21],"into":[22],"logic.":[23],"In":[24],"this":[25],"paper,":[26],"we":[27],"exploit":[28],"FeFET":[29,49],"nonvolatility":[30],"design":[32,69],"lookup":[33],"tables":[34],"(LUTs),":[35],"which":[36,60],"obvious":[38],"utility":[39],"in":[40,57,108],"field-programmable":[41],"gate":[42],"arrays,":[43],"etc.":[44],"With":[45],"nonvolatility,":[46],"single":[48],"can":[50,61],"be":[51],"used":[52],"as":[53,102,104],"cell":[56],"an":[58],"LUT,":[59],"help":[62],"reduce":[63],"both":[64,70,95],"area.":[67],"We":[68],"static":[71,97],"dynamic":[73],"logic":[74],"style":[75],"LUTs.":[76,87],"Read":[77],"write":[79],"schemes":[80],"are":[81],"also":[82],"designed":[83],"for":[84],"proposed":[86],"Evaluation":[88],"results":[89],"show":[90],"that":[91],"our":[92],"LUTs":[93,101,107],"outperform":[94],"conventional":[96],"random-access":[98],"memory":[99],"based":[100],"well":[103],"other":[105],"term":[109],"of":[110],"area-power-delay":[111],"product.":[112]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":4},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
