{"id":"https://openalex.org/W2801566828","doi":"https://doi.org/10.1109/iscas.2018.8351299","title":"Data-Aware Partial ECC with Data Modulation of ReRAM with Non-volatile In-memory Computing for Image Recognition with Deep Neural Network","display_name":"Data-Aware Partial ECC with Data Modulation of ReRAM with Non-volatile In-memory Computing for Image Recognition with Deep Neural Network","publication_year":2018,"publication_date":"2018-05-01","ids":{"openalex":"https://openalex.org/W2801566828","doi":"https://doi.org/10.1109/iscas.2018.8351299","mag":"2801566828"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2018.8351299","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2018.8351299","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5082246867","display_name":"Atsuna Hayakawa","orcid":null},"institutions":[{"id":"https://openalex.org/I96679780","display_name":"Chuo University","ror":"https://ror.org/03qvqb743","country_code":"JP","type":"education","lineage":["https://openalex.org/I96679780"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Atsuna Hayakawa","raw_affiliation_strings":["Department of Electrical, Electronic, and Communication Engineering, Chuo University, Tokyo, Japan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical, Electronic, and Communication Engineering, Chuo University, Tokyo, Japan","institution_ids":["https://openalex.org/I96679780"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088724596","display_name":"Toshiki Nakamura","orcid":"https://orcid.org/0000-0002-0746-4807"},"institutions":[{"id":"https://openalex.org/I96679780","display_name":"Chuo University","ror":"https://ror.org/03qvqb743","country_code":"JP","type":"education","lineage":["https://openalex.org/I96679780"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Toshiki Nakamura","raw_affiliation_strings":["Department of Electrical, Electronic, and Communication Engineering, Chuo University, Tokyo, Japan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical, Electronic, and Communication Engineering, Chuo University, Tokyo, Japan","institution_ids":["https://openalex.org/I96679780"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043922603","display_name":"Yoshiaki Deguchi","orcid":"https://orcid.org/0000-0002-1319-4647"},"institutions":[{"id":"https://openalex.org/I96679780","display_name":"Chuo University","ror":"https://ror.org/03qvqb743","country_code":"JP","type":"education","lineage":["https://openalex.org/I96679780"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Yoshiaki Deguchi","raw_affiliation_strings":["Department of Electrical, Electronic, and Communication Engineering, Chuo University, Tokyo, Japan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical, Electronic, and Communication Engineering, Chuo University, Tokyo, Japan","institution_ids":["https://openalex.org/I96679780"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028678084","display_name":"Kazuki Maeda","orcid":"https://orcid.org/0000-0002-5729-6194"},"institutions":[{"id":"https://openalex.org/I96679780","display_name":"Chuo University","ror":"https://ror.org/03qvqb743","country_code":"JP","type":"education","lineage":["https://openalex.org/I96679780"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Kazuki Maeda","raw_affiliation_strings":["Department of Electrical, Electronic, and Communication Engineering, Chuo University, Tokyo, Japan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical, Electronic, and Communication Engineering, Chuo University, Tokyo, Japan","institution_ids":["https://openalex.org/I96679780"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5032914719","display_name":"Ken Takeuchi","orcid":"https://orcid.org/0000-0002-9345-6503"},"institutions":[{"id":"https://openalex.org/I96679780","display_name":"Chuo University","ror":"https://ror.org/03qvqb743","country_code":"JP","type":"education","lineage":["https://openalex.org/I96679780"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Ken Takeuchi","raw_affiliation_strings":["Department of Electrical, Electronic, and Communication Engineering, Chuo University, Tokyo, Japan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical, Electronic, and Communication Engineering, Chuo University, Tokyo, Japan","institution_ids":["https://openalex.org/I96679780"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5082246867"],"corresponding_institution_ids":["https://openalex.org/I96679780"],"apc_list":null,"apc_paid":null,"fwci":0.1288,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.45925909,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":93},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.9003225564956665},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7244693636894226},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.5609965920448303},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5274562835693359},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5222911834716797},{"id":"https://openalex.org/keywords/flash-memory","display_name":"Flash memory","score":0.4349152445793152},{"id":"https://openalex.org/keywords/memory-controller","display_name":"Memory controller","score":0.42159461975097656},{"id":"https://openalex.org/keywords/error-detection-and-correction","display_name":"Error detection and correction","score":0.41038423776626587},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.1969529092311859},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.1278221309185028},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.1055903434753418},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09912741184234619},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.09544378519058228},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.08335134387016296}],"concepts":[{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.9003225564956665},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7244693636894226},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.5609965920448303},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5274562835693359},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5222911834716797},{"id":"https://openalex.org/C2776531357","wikidata":"https://www.wikidata.org/wiki/Q174077","display_name":"Flash memory","level":2,"score":0.4349152445793152},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.42159461975097656},{"id":"https://openalex.org/C103088060","wikidata":"https://www.wikidata.org/wiki/Q1062839","display_name":"Error detection and correction","level":2,"score":0.41038423776626587},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.1969529092311859},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.1278221309185028},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.1055903434753418},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09912741184234619},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.09544378519058228},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.08335134387016296},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2018.8351299","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2018.8351299","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320337392","display_name":"Division of Electrical, Communications and Cyber Systems","ror":"https://ror.org/01krpsy48"},{"id":"https://openalex.org/F4320338075","display_name":"Core Research for Evolutional Science and Technology","ror":"https://ror.org/00097mb19"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1966252431","https://openalex.org/W2007300900","https://openalex.org/W2013028205","https://openalex.org/W2067525510","https://openalex.org/W2178102281","https://openalex.org/W2221855158","https://openalex.org/W2739689420"],"related_works":["https://openalex.org/W2545245183","https://openalex.org/W4400205904","https://openalex.org/W2371250805","https://openalex.org/W2139555711","https://openalex.org/W3117653833","https://openalex.org/W1593402818","https://openalex.org/W1967034130","https://openalex.org/W2390910150","https://openalex.org/W2082585011","https://openalex.org/W1978058638"],"abstract_inverted_index":{"This":[0],"paper":[1],"proposes":[2],"data-aware":[3,91],"ECC":[4,23,50,79,92],"of":[5,54,66,71,107,118],"resistive":[6],"random":[7],"access":[8],"memory":[9,34],"(ReRAM)":[10],"in":[11,32],"the":[12,33,64,67,75,100,110,116,121],"non-volatile":[13],"in-memory":[14],"computing":[15],"for":[16,59,120],"image":[17,72,122],"recognition.":[18],"Proposed":[19,61],"Data-Aw":[20],"are":[21],"Partial":[22],"with":[24,86],"Data":[25],"Modulation":[26],"(DAP-ECC":[27],"w/":[28,95],"DM)":[29],"is":[30,124],"implemented":[31],"controller":[35,37],"without":[36],"circuit":[38],"area":[39],"overhead.":[40],"Because":[41],"ReRAM":[42,119],"has":[43],"smaller":[44],"capacity":[45],"than":[46],"NAND":[47],"flash,":[48],"proposed":[49,90],"efficiently":[51],"reduces":[52],"overhead":[53],"error-correcting":[55],"code":[56],"(ECC)":[57],"parity":[58],"ReRAM.":[60],"DAP-ECC":[62,94],"considers":[63],"importance":[65],"feature":[68],"vector":[69],"data":[70,76],"recognition,":[73],"decreases":[74],"overhead,":[77],"and":[78],"decode":[80],"latency":[81],"by":[82,113,126],"each":[83],"75%":[84],"compared":[85],"conventional":[87],"ECC.":[88],"Moreover,":[89],"using":[93],"DM,":[96],"which":[97],"fully":[98],"utilizes":[99],"asymmetrical":[101],"bit":[102],"error":[103],"rate":[104],"(BER)":[105],"characteristics":[106],"ReRAM,":[108],"improves":[109],"acceptable":[111],"BER":[112],"1.91-times.":[114],"Finally,":[115],"endurance":[117],"recognition":[123],"improved":[125],"10-times.":[127]},"counts_by_year":[{"year":2021,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}