{"id":"https://openalex.org/W2799558639","doi":"https://doi.org/10.1109/iscas.2018.8351297","title":"Combinational Access Tunnel FET SRAM for Ultra-Low Power Applications","display_name":"Combinational Access Tunnel FET SRAM for Ultra-Low Power Applications","publication_year":2018,"publication_date":"2018-01-01","ids":{"openalex":"https://openalex.org/W2799558639","doi":"https://doi.org/10.1109/iscas.2018.8351297","mag":"2799558639"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2018.8351297","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2018.8351297","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101296217","display_name":"Libo Yang","orcid":"https://orcid.org/0009-0001-5160-6155"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Libo Yang","raw_affiliation_strings":["Laboratory of Microelectronic Devices and Circuits (MOE), Institute of Microelectronics"],"affiliations":[{"raw_affiliation_string":"Laboratory of Microelectronic Devices and Circuits (MOE), Institute of Microelectronics","institution_ids":["https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001295386","display_name":"Jiadi Zhu","orcid":"https://orcid.org/0000-0001-7319-3913"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jiadi Zhu","raw_affiliation_strings":["Laboratory of Microelectronic Devices and Circuits (MOE), Institute of Microelectronics"],"affiliations":[{"raw_affiliation_string":"Laboratory of Microelectronic Devices and Circuits (MOE), Institute of Microelectronics","institution_ids":["https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100420537","display_name":"Cheng Chen","orcid":"https://orcid.org/0000-0002-2226-9102"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Cheng Chen","raw_affiliation_strings":["Laboratory of Microelectronic Devices and Circuits (MOE), Institute of Microelectronics"],"affiliations":[{"raw_affiliation_string":"Laboratory of Microelectronic Devices and Circuits (MOE), Institute of Microelectronics","institution_ids":["https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5046729236","display_name":"Zhixuan Wang","orcid":"https://orcid.org/0000-0002-1044-214X"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhixuan Wang","raw_affiliation_strings":["Laboratory of Microelectronic Devices and Circuits (MOE), Institute of Microelectronics"],"affiliations":[{"raw_affiliation_string":"Laboratory of Microelectronic Devices and Circuits (MOE), Institute of Microelectronics","institution_ids":["https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073144682","display_name":"Zexue Liu","orcid":null},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zexue Liu","raw_affiliation_strings":["Laboratory of Microelectronic Devices and Circuits (MOE), Institute of Microelectronics"],"affiliations":[{"raw_affiliation_string":"Laboratory of Microelectronic Devices and Circuits (MOE), Institute of Microelectronics","institution_ids":["https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017373294","display_name":"Qianqian Huang","orcid":"https://orcid.org/0000-0002-3714-8581"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Qianqian Huang","raw_affiliation_strings":["Laboratory of Microelectronic Devices and Circuits (MOE), Institute of Microelectronics"],"affiliations":[{"raw_affiliation_string":"Laboratory of Microelectronic Devices and Circuits (MOE), Institute of Microelectronics","institution_ids":["https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003039083","display_name":"Le Ye","orcid":"https://orcid.org/0000-0003-0599-7762"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Le Ye","raw_affiliation_strings":["Laboratory of Microelectronic Devices and Circuits (MOE), Institute of Microelectronics"],"affiliations":[{"raw_affiliation_string":"Laboratory of Microelectronic Devices and Circuits (MOE), Institute of Microelectronics","institution_ids":["https://openalex.org/I4210119392"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5062886480","display_name":"Ru Huang","orcid":"https://orcid.org/0000-0002-8146-4821"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ru Huang","raw_affiliation_strings":["Laboratory of Microelectronic Devices and Circuits (MOE), Institute of Microelectronics"],"affiliations":[{"raw_affiliation_string":"Laboratory of Microelectronic Devices and Circuits (MOE), Institute of Microelectronics","institution_ids":["https://openalex.org/I4210119392"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":8,"corresponding_author_ids":["https://openalex.org/A5101296217"],"corresponding_institution_ids":["https://openalex.org/I4210119392"],"apc_list":null,"apc_paid":null,"fwci":0.785,"has_fulltext":false,"cited_by_count":15,"citation_normalized_percentile":{"value":0.73505944,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.8496146202087402},{"id":"https://openalex.org/keywords/network-topology","display_name":"Network topology","score":0.6669415831565857},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.6561041474342346},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5000698566436768},{"id":"https://openalex.org/keywords/noise-margin","display_name":"Noise margin","score":0.4810805022716522},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4704410433769226},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4435286521911621},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.4287322461605072},{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.427035927772522},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.4011138081550598},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.38390833139419556},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.38156992197036743},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.3793399930000305},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.2974729537963867},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.223921537399292},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.14363673329353333}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.8496146202087402},{"id":"https://openalex.org/C199845137","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Network topology","level":2,"score":0.6669415831565857},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.6561041474342346},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5000698566436768},{"id":"https://openalex.org/C179499742","wikidata":"https://www.wikidata.org/wiki/Q1324892","display_name":"Noise margin","level":4,"score":0.4810805022716522},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4704410433769226},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4435286521911621},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.4287322461605072},{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.427035927772522},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.4011138081550598},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.38390833139419556},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.38156992197036743},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.3793399930000305},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.2974729537963867},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.223921537399292},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.14363673329353333},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2018.8351297","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2018.8351297","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1533480815","https://openalex.org/W1675311876","https://openalex.org/W1753784006","https://openalex.org/W1965095816","https://openalex.org/W1993093542","https://openalex.org/W1996271793","https://openalex.org/W2032197740","https://openalex.org/W2035038896","https://openalex.org/W2057874658","https://openalex.org/W2071637642","https://openalex.org/W2086769748","https://openalex.org/W2110584581","https://openalex.org/W2132688693","https://openalex.org/W2153830758","https://openalex.org/W2157743350","https://openalex.org/W2221168811","https://openalex.org/W2756650765","https://openalex.org/W4253730527","https://openalex.org/W6637388137","https://openalex.org/W6679915245"],"related_works":["https://openalex.org/W2118528827","https://openalex.org/W1582224818","https://openalex.org/W2775062502","https://openalex.org/W2044270051","https://openalex.org/W4285609043","https://openalex.org/W2894151971","https://openalex.org/W2549050530","https://openalex.org/W3082116521","https://openalex.org/W2536679433","https://openalex.org/W2164440002"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"a":[3],"novel":[4],"combinational":[5,70],"access":[6,71],"topology":[7,35,74],"of":[8,23,87,96],"Tunnel":[9],"FET":[10],"(TFET)":[11],"SRAM":[12,30,48,73,83],"is":[13],"proposed":[14,34],"for":[15,106],"ultra-Low":[16],"Power":[17],"applications.":[18,109],"Since":[19],"forward":[20,39],"p-i-n":[21,44],"current":[22],"TFET":[24,72,82],"could":[25],"cause":[26],"serious":[27],"damage":[28],"to":[29,42],"circuit":[31],"performance,":[32],"the":[33,38,43,69],"can":[36],"avoid":[37],"bias":[40],"applied":[41],"junction,":[45],"thus":[46],"increasing":[47],"cell":[49],"read":[50],"and":[51,57,93],"hold":[52,77],"static":[53,60,90],"noise":[54],"margin":[55],"(SNM)":[56],"decreasing":[58],"its":[59,103],"power":[61,91,99,108],"consumption":[62],"dramatically.":[63],"At":[64],"0.6":[65],"V":[66],"supply":[67],"voltage,":[68],"presents":[75],"26%":[76],"SNM":[78],"larger":[79],"than":[80],"traditional":[81],"topologies,":[84],"8":[85],"orders":[86],"magnitude":[88,97],"lower":[89,98],"consumption,":[92],"2":[94],"order":[95],"delay":[100],"product,":[101],"demonstrating":[102],"great":[104],"potential":[105],"ultra-low":[107]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":1}],"updated_date":"2026-04-07T14:57:38.498316","created_date":"2025-10-10T00:00:00"}
