{"id":"https://openalex.org/W2800762012","doi":"https://doi.org/10.1109/iscas.2018.8351292","title":"A Sub-ps Integrated-Jitter 10 GHz ADPLL with Fractional Capacitor","display_name":"A Sub-ps Integrated-Jitter 10 GHz ADPLL with Fractional Capacitor","publication_year":2018,"publication_date":"2018-05-01","ids":{"openalex":"https://openalex.org/W2800762012","doi":"https://doi.org/10.1109/iscas.2018.8351292","mag":"2800762012"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2018.8351292","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2018.8351292","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5021502751","display_name":"Linqi Shi","orcid":"https://orcid.org/0000-0002-9534-795X"},"institutions":[{"id":"https://openalex.org/I136765683","display_name":"Tianjin University of Technology","ror":"https://ror.org/00zbe0w13","country_code":"CN","type":"education","lineage":["https://openalex.org/I136765683"]},{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Linqi Shi","raw_affiliation_strings":["Peking University Information Technology Institute (Tianjin Binhai), Tianjin, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Peking University Information Technology Institute (Tianjin Binhai), Tianjin, China","institution_ids":["https://openalex.org/I136765683","https://openalex.org/I20231570"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003860860","display_name":"Weixin Gai","orcid":"https://orcid.org/0000-0002-7162-2427"},"institutions":[{"id":"https://openalex.org/I136765683","display_name":"Tianjin University of Technology","ror":"https://ror.org/00zbe0w13","country_code":"CN","type":"education","lineage":["https://openalex.org/I136765683"]},{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Weixin Gai","raw_affiliation_strings":["Peking University Information Technology Institute (Tianjin Binhai), Tianjin, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Peking University Information Technology Institute (Tianjin Binhai), Tianjin, China","institution_ids":["https://openalex.org/I136765683","https://openalex.org/I20231570"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028385492","display_name":"Jichao Huang","orcid":"https://orcid.org/0000-0002-2214-5716"},"institutions":[{"id":"https://openalex.org/I136765683","display_name":"Tianjin University of Technology","ror":"https://ror.org/00zbe0w13","country_code":"CN","type":"education","lineage":["https://openalex.org/I136765683"]},{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jichao Huang","raw_affiliation_strings":["Peking University Information Technology Institute (Tianjin Binhai), Tianjin, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Peking University Information Technology Institute (Tianjin Binhai), Tianjin, China","institution_ids":["https://openalex.org/I136765683","https://openalex.org/I20231570"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059402391","display_name":"Liangxiao Tang","orcid":null},"institutions":[{"id":"https://openalex.org/I136765683","display_name":"Tianjin University of Technology","ror":"https://ror.org/00zbe0w13","country_code":"CN","type":"education","lineage":["https://openalex.org/I136765683"]},{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Liangxiao Tang","raw_affiliation_strings":["Peking University Information Technology Institute (Tianjin Binhai), Tianjin, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Peking University Information Technology Institute (Tianjin Binhai), Tianjin, China","institution_ids":["https://openalex.org/I136765683","https://openalex.org/I20231570"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5115598414","display_name":"Xiang Xiao","orcid":"https://orcid.org/0000-0001-5330-9245"},"institutions":[{"id":"https://openalex.org/I136765683","display_name":"Tianjin University of Technology","ror":"https://ror.org/00zbe0w13","country_code":"CN","type":"education","lineage":["https://openalex.org/I136765683"]},{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiao Xiang","raw_affiliation_strings":["Peking University Information Technology Institute (Tianjin Binhai), Tianjin, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Peking University Information Technology Institute (Tianjin Binhai), Tianjin, China","institution_ids":["https://openalex.org/I136765683","https://openalex.org/I20231570"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"54","issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.8825175762176514},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.8009123802185059},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6399002075195312},{"id":"https://openalex.org/keywords/dbc","display_name":"dBc","score":0.6307666301727295},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.6136325597763062},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.6086971759796143},{"id":"https://openalex.org/keywords/decoupling-capacitor","display_name":"Decoupling capacitor","score":0.5359004735946655},{"id":"https://openalex.org/keywords/offset","display_name":"Offset (computer science)","score":0.4790183901786804},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.44122856855392456},{"id":"https://openalex.org/keywords/resolution","display_name":"Resolution (logic)","score":0.4323529005050659},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.42809587717056274},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.42288443446159363},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.401602566242218},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.3217267394065857},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.27892592549324036},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.25047871470451355},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2221115231513977}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.8825175762176514},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.8009123802185059},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6399002075195312},{"id":"https://openalex.org/C193523891","wikidata":"https://www.wikidata.org/wiki/Q1771950","display_name":"dBc","level":3,"score":0.6307666301727295},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.6136325597763062},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.6086971759796143},{"id":"https://openalex.org/C35196352","wikidata":"https://www.wikidata.org/wiki/Q1532649","display_name":"Decoupling capacitor","level":4,"score":0.5359004735946655},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.4790183901786804},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.44122856855392456},{"id":"https://openalex.org/C138268822","wikidata":"https://www.wikidata.org/wiki/Q1051925","display_name":"Resolution (logic)","level":2,"score":0.4323529005050659},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.42809587717056274},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.42288443446159363},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.401602566242218},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.3217267394065857},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.27892592549324036},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.25047871470451355},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2221115231513977},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2018.8351292","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2018.8351292","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8399999737739563,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W2033675564","https://openalex.org/W2038643681","https://openalex.org/W2082211203","https://openalex.org/W2090406803","https://openalex.org/W2154332266","https://openalex.org/W2317713607","https://openalex.org/W2593145514"],"related_works":["https://openalex.org/W1994021281","https://openalex.org/W2540832666","https://openalex.org/W4286579627","https://openalex.org/W2139484866","https://openalex.org/W1851259350","https://openalex.org/W272184114","https://openalex.org/W2117747481","https://openalex.org/W2394282069","https://openalex.org/W3189810088","https://openalex.org/W2141726610"],"abstract_inverted_index":{"A":[0,14],"10":[1,71],"GHz":[2,72],"bang-bang":[3],"all-digital":[4],"phase-locked":[5],"loop":[6],"(BB-ADPLL)":[7],"is":[8,20,40,58,74,85],"proposed":[9,21,70],"for":[10],"high-speed":[11],"wireline":[12],"communication.":[13],"novel":[15],"high":[16],"resolution":[17,37],"fractional":[18],"capacitor":[19],"in":[22,60],"LC-DCO,":[23],"which":[24],"overcomes":[25],"the":[26,47,51,69,82],"process":[27],"limitation":[28],"of":[29,38,50,68,109],"MOM":[30],"capacitors":[31],"and":[32,46,81,104],"raises":[33],"Q":[34,48],"factor.":[35],"The":[36,56,65,93],"DCO":[39],"improved":[41],"more":[42],"than":[43],"ten":[44],"times":[45],"factor":[49],"LC-tank":[52],"increases":[53],"two":[54],"times.":[55],"ADPLL":[57,73,94],"fabricated":[59],"65":[61],"nm":[62],"CMOS":[63],"process.":[64],"phase":[66],"noise":[67],"-95.7":[75],"dBc/Hz":[76],"@":[77],"1":[78],"MHz":[79],"offset":[80],"RMS":[83],"jitter":[84],"0.88":[86],"ps":[87],"(1":[88],"kHz":[89],"to":[90],"100":[91],"MHz).":[92],"consumes":[95],"10.5":[96],"mW":[97],"from":[98],"a":[99],"1.2":[100],"V":[101],"supply":[102],"voltage":[103],"occupies":[105],"an":[106],"active":[107],"area":[108],"0.06":[110],"mm":[111],"<sup":[112],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[113],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[114],".":[115]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
