{"id":"https://openalex.org/W2788104182","doi":"https://doi.org/10.1109/iscas.2018.8351057","title":"Mismatch Compensation Technique for Inverter-Based CMOS Circuits","display_name":"Mismatch Compensation Technique for Inverter-Based CMOS Circuits","publication_year":2018,"publication_date":"2018-05-01","ids":{"openalex":"https://openalex.org/W2788104182","doi":"https://doi.org/10.1109/iscas.2018.8351057","mag":"2788104182"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2018.8351057","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2018.8351057","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://pure.manchester.ac.uk/ws/files/67034525/PID5233581.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5008891938","display_name":"Przemyslaw Mroszczyk","orcid":"https://orcid.org/0000-0002-7586-1839"},"institutions":[{"id":"https://openalex.org/I28407311","display_name":"University of Manchester","ror":"https://ror.org/027m9bs27","country_code":"GB","type":"education","lineage":["https://openalex.org/I28407311"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"Przemyslaw Mroszczyk","raw_affiliation_strings":["Advanced Processor Technologies Group, The University of Manchester, Manchester, UK"],"affiliations":[{"raw_affiliation_string":"Advanced Processor Technologies Group, The University of Manchester, Manchester, UK","institution_ids":["https://openalex.org/I28407311"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5031542707","display_name":"Vasilis F. Pavlidis","orcid":"https://orcid.org/0000-0002-4063-4652"},"institutions":[{"id":"https://openalex.org/I28407311","display_name":"University of Manchester","ror":"https://ror.org/027m9bs27","country_code":"GB","type":"education","lineage":["https://openalex.org/I28407311"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Vasilis F. Pavlidis","raw_affiliation_strings":["Advanced Processor Technologies Group, The University of Manchester, Manchester, UK"],"affiliations":[{"raw_affiliation_string":"Advanced Processor Technologies Group, The University of Manchester, Manchester, UK","institution_ids":["https://openalex.org/I28407311"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5008891938"],"corresponding_institution_ids":["https://openalex.org/I28407311"],"apc_list":null,"apc_paid":null,"fwci":0.4457,"has_fulltext":true,"cited_by_count":8,"citation_normalized_percentile":{"value":0.60118123,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7250315546989441},{"id":"https://openalex.org/keywords/compensation","display_name":"Compensation (psychology)","score":0.6615362167358398},{"id":"https://openalex.org/keywords/inverter","display_name":"Inverter","score":0.6418929100036621},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5847772359848022},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5719566345214844},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5039579272270203},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3941369652748108},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2209850251674652},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.1510726511478424}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7250315546989441},{"id":"https://openalex.org/C2780023022","wikidata":"https://www.wikidata.org/wiki/Q1338171","display_name":"Compensation (psychology)","level":2,"score":0.6615362167358398},{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.6418929100036621},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5847772359848022},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5719566345214844},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5039579272270203},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3941369652748108},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2209850251674652},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.1510726511478424},{"id":"https://openalex.org/C11171543","wikidata":"https://www.wikidata.org/wiki/Q41630","display_name":"Psychoanalysis","level":1,"score":0.0},{"id":"https://openalex.org/C15744967","wikidata":"https://www.wikidata.org/wiki/Q9418","display_name":"Psychology","level":0,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/iscas.2018.8351057","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2018.8351057","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},{"id":"pmh:oai:pure.atira.dk:openaire_cris_publications/deec66fb-e4cb-4c99-9280-d82b8449cddf","is_oa":true,"landing_page_url":"https://research.manchester.ac.uk/en/publications/deec66fb-e4cb-4c99-9280-d82b8449cddf","pdf_url":"https://pure.manchester.ac.uk/ws/files/67034525/PID5233581.pdf","source":{"id":"https://openalex.org/S4306400662","display_name":"Research Explorer (The University of Manchester)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I28407311","host_organization_name":"University of Manchester","host_organization_lineage":["https://openalex.org/I28407311"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Mroszczyk, P & Pavlidis, V 2018, Mismatch Compensation Technique for Inverter-Based CMOS Circuits. in IEEE International Symposium on Circuits and Systems. https://doi.org/10.1109/ISCAS.2018.8351057","raw_type":"info:eu-repo/semantics/publishedVersion"},{"id":"pmh:oai:pure.atira.dk:publications/deec66fb-e4cb-4c99-9280-d82b8449cddf","is_oa":false,"landing_page_url":"https://www.research.manchester.ac.uk/portal/en/publications/mismatch-compensation-technique-for-inverterbased-cmos-circuits(deec66fb-e4cb-4c99-9280-d82b8449cddf).html","pdf_url":null,"source":{"id":"https://openalex.org/S4306400662","display_name":"Research Explorer (The University of Manchester)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I28407311","host_organization_name":"University of Manchester","host_organization_lineage":["https://openalex.org/I28407311"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":""}],"best_oa_location":{"id":"pmh:oai:pure.atira.dk:openaire_cris_publications/deec66fb-e4cb-4c99-9280-d82b8449cddf","is_oa":true,"landing_page_url":"https://research.manchester.ac.uk/en/publications/deec66fb-e4cb-4c99-9280-d82b8449cddf","pdf_url":"https://pure.manchester.ac.uk/ws/files/67034525/PID5233581.pdf","source":{"id":"https://openalex.org/S4306400662","display_name":"Research Explorer (The University of Manchester)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I28407311","host_organization_name":"University of Manchester","host_organization_lineage":["https://openalex.org/I28407311"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Mroszczyk, P & Pavlidis, V 2018, Mismatch Compensation Technique for Inverter-Based CMOS Circuits. in IEEE International Symposium on Circuits and Systems. https://doi.org/10.1109/ISCAS.2018.8351057","raw_type":"info:eu-repo/semantics/publishedVersion"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8999999761581421,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2788104182.pdf","grobid_xml":"https://content.openalex.org/works/W2788104182.grobid-xml"},"referenced_works_count":10,"referenced_works":["https://openalex.org/W1551492857","https://openalex.org/W1601180381","https://openalex.org/W2076528485","https://openalex.org/W2081310042","https://openalex.org/W2083899364","https://openalex.org/W2094024001","https://openalex.org/W2123579933","https://openalex.org/W2140281076","https://openalex.org/W2140823559","https://openalex.org/W2144057924"],"related_works":["https://openalex.org/W3014521742","https://openalex.org/W2617868873","https://openalex.org/W3204141294","https://openalex.org/W98453623","https://openalex.org/W2340624421","https://openalex.org/W2389800961","https://openalex.org/W1995389502","https://openalex.org/W2109445684","https://openalex.org/W2081082331","https://openalex.org/W4241196849"],"abstract_inverted_index":{"Inverter-based":[0],"CMOS":[1,53,110],"circuits":[2,29],"are":[3],"often":[4],"considered":[5],"in":[6,122],"the":[7,25,48,80,91,96,99,102,125,133],"front-end":[8],"modules":[9],"for":[10],"optical":[11],"and":[12,17,93,98,128,130],"wireline":[13],"communication":[14],"A-D":[15],"conversion,":[16],"analogue":[18],"computation.":[19],"Due":[20],"to":[21,46,73],"parameter":[22,58],"variability":[23],"(mismatch),":[24],"performance":[26],"of":[27,43,51,79,95,101,115,124],"such":[28],"is":[30,60,83,119],"usually":[31],"degraded.":[32],"This":[33],"paper":[34],"presents":[35],"a":[36,41,86,107,116],"mismatch":[37,81],"compensation":[38,82],"technique":[39],"employing":[40],"set":[42],"redundant":[44],"switches":[45],"trim":[47],"switching":[49],"threshold":[50],"inverter-based":[52],"circuits.":[54],"Over":[55],"10\u00d7":[56],"better":[57],"matching":[59],"observed":[61],"at":[62],"no":[63],"additional":[64],"energy":[65,127],"cost":[66],"or":[67],"significant":[68],"gate":[69],"area":[70],"increase,":[71],"compared":[72,131],"\u201ctraditional\u201d":[74],"geometry":[75,134],"scaling.":[76],"The":[77,112],"efficiency":[78],"investigated":[84,121],"across":[85],"broad":[87],"design":[88],"space":[89],"considering":[90],"number":[92],"size":[94,100],"switches,":[97],"inverter,":[103],"using":[104],"model:":[105],"from":[106],"65":[108],"nm":[109],"technology.":[111],"case":[113],"study":[114],"comparator":[117],"circuit":[118],"further":[120],"terms":[123],"reliability,":[126],"area,":[129],"against":[132],"scaling":[135],"approach.":[136]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2}],"updated_date":"2026-04-20T07:46:08.049788","created_date":"2025-10-10T00:00:00"}