{"id":"https://openalex.org/W2801043856","doi":"https://doi.org/10.1109/iscas.2018.8351007","title":"Frequency Synthesis Based on A Novel Differential Locking Mechanism","display_name":"Frequency Synthesis Based on A Novel Differential Locking Mechanism","publication_year":2018,"publication_date":"2018-01-01","ids":{"openalex":"https://openalex.org/W2801043856","doi":"https://doi.org/10.1109/iscas.2018.8351007","mag":"2801043856"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2018.8351007","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2018.8351007","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111719252","display_name":"Jinghang Liang","orcid":null},"institutions":[{"id":"https://openalex.org/I154425047","display_name":"University of Alberta","ror":"https://ror.org/0160cpw27","country_code":"CA","type":"education","lineage":["https://openalex.org/I154425047"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Jinghang Liang","raw_affiliation_strings":["Department of ECE, University of Alberta, Edmonton, Alberta"],"affiliations":[{"raw_affiliation_string":"Department of ECE, University of Alberta, Edmonton, Alberta","institution_ids":["https://openalex.org/I154425047"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5066973305","display_name":"D.G. Elliott","orcid":"https://orcid.org/0000-0003-0438-1800"},"institutions":[{"id":"https://openalex.org/I154425047","display_name":"University of Alberta","ror":"https://ror.org/0160cpw27","country_code":"CA","type":"education","lineage":["https://openalex.org/I154425047"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Duncan G. Elliott","raw_affiliation_strings":["Department of ECE, University of Alberta, Edmonton, Alberta"],"affiliations":[{"raw_affiliation_string":"Department of ECE, University of Alberta, Edmonton, Alberta","institution_ids":["https://openalex.org/I154425047"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5111719252"],"corresponding_institution_ids":["https://openalex.org/I154425047"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.03816452,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"1","issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.8268206715583801},{"id":"https://openalex.org/keywords/voltage-controlled-oscillator","display_name":"Voltage-controlled oscillator","score":0.769748866558075},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6582096219062805},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5295185446739197},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.5237241387367249},{"id":"https://openalex.org/keywords/lock","display_name":"Lock (firearm)","score":0.49278929829597473},{"id":"https://openalex.org/keywords/frequency-divider","display_name":"Frequency divider","score":0.48347336053848267},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.45334482192993164},{"id":"https://openalex.org/keywords/automatic-frequency-control","display_name":"Automatic frequency control","score":0.452082097530365},{"id":"https://openalex.org/keywords/phase-frequency-detector","display_name":"Phase frequency detector","score":0.42257189750671387},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.202487975358963},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.184606671333313},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.13778218626976013},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.11467912793159485},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11156558990478516},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.10169628262519836}],"concepts":[{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.8268206715583801},{"id":"https://openalex.org/C5291336","wikidata":"https://www.wikidata.org/wiki/Q852341","display_name":"Voltage-controlled oscillator","level":3,"score":0.769748866558075},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6582096219062805},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5295185446739197},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.5237241387367249},{"id":"https://openalex.org/C174839445","wikidata":"https://www.wikidata.org/wiki/Q1134386","display_name":"Lock (firearm)","level":2,"score":0.49278929829597473},{"id":"https://openalex.org/C74982907","wikidata":"https://www.wikidata.org/wiki/Q1455624","display_name":"Frequency divider","level":3,"score":0.48347336053848267},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.45334482192993164},{"id":"https://openalex.org/C25915539","wikidata":"https://www.wikidata.org/wiki/Q220786","display_name":"Automatic frequency control","level":2,"score":0.452082097530365},{"id":"https://openalex.org/C2776158855","wikidata":"https://www.wikidata.org/wiki/Q2085341","display_name":"Phase frequency detector","level":5,"score":0.42257189750671387},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.202487975358963},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.184606671333313},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.13778218626976013},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.11467912793159485},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11156558990478516},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.10169628262519836},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C114825011","wikidata":"https://www.wikidata.org/wiki/Q440704","display_name":"Charge pump","level":4,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2018.8351007","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2018.8351007","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1500201982","https://openalex.org/W1569114084","https://openalex.org/W2088743615","https://openalex.org/W2097406868","https://openalex.org/W2105014900","https://openalex.org/W2116039425","https://openalex.org/W2122977511","https://openalex.org/W2160721146","https://openalex.org/W2171035445","https://openalex.org/W2344226595","https://openalex.org/W2501462716","https://openalex.org/W2516725835","https://openalex.org/W2605666562","https://openalex.org/W6633696140"],"related_works":["https://openalex.org/W2576236588","https://openalex.org/W2896013912","https://openalex.org/W2558244976","https://openalex.org/W1963609993","https://openalex.org/W1800913809","https://openalex.org/W2769299326","https://openalex.org/W1600405202","https://openalex.org/W3007469504","https://openalex.org/W2774664569","https://openalex.org/W775914698"],"abstract_inverted_index":{"In":[0,65],"this":[1,66],"frequency":[2,26,44,51,112,141],"synthesis":[3],"architecture,":[4],"instead":[5],"of":[6,46,56,85,110,114,142],"a":[7,63,79,91,103,123],"reference":[8,59,81,92],"clock,":[9,93],"two":[10,94],"frequencies":[11],"derived":[12],"from":[13],"the":[14,20,38,54,70,87,108,132],"VCO":[15,25],"output":[16],"are":[17,97],"fed":[18],"into":[19],"PFD,":[21],"one":[22,28,57],"increasing":[23],"with":[24,53,90,99],"and":[27,116],"decreasing.":[29],"Existing":[30],"Alias-Locked":[31],"Loops":[32],"(ALLs)":[33],"use":[34],"digital":[35],"samplers":[36],"in":[37,102],"feedback":[39,88,95],"path":[40],"to":[41,62,122],"achieve":[42],"wide":[43,111],"range":[45,113],"control":[47],"for":[48],"high":[49],"speed":[50],"synthesis,":[52],"cost":[55,120],"additional":[58],"clock":[60,82],"compared":[61,98,121],"PLL.":[64,126],"paper,":[67],"we":[68],"propose":[69],"differential":[71],"alias-locked":[72],"loop":[73],"(D-ALL)":[74],"circuit":[75],"architecture":[76],"which":[77],"uses":[78],"single":[80],"input.":[83],"Instead":[84],"comparing":[86],"signal":[89],"signals":[96],"each":[100],"other":[101],"D-ALL.":[104],"A":[105],"D-ALL":[106],"has":[107,129],"advantage":[109],"operation":[115],"low":[117],"silicon":[118],"area":[119],"traditional":[124],"high-frequency":[125],"Spectre":[127],"simulation":[128],"verified":[130],"that":[131],"proposed":[133],"design":[134],"achieves":[135],"lock":[136],"at":[137],"an":[138],"example":[139],"target":[140],"9.7":[143],"GHz.":[144]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
