{"id":"https://openalex.org/W2801623895","doi":"https://doi.org/10.1109/iscas.2018.8350995","title":"A Wide-Range All-Digital Delay-Locked Loop for Double Data Rate Synchronous Dynamic Random Access Memory Application","display_name":"A Wide-Range All-Digital Delay-Locked Loop for Double Data Rate Synchronous Dynamic Random Access Memory Application","publication_year":2018,"publication_date":"2018-01-01","ids":{"openalex":"https://openalex.org/W2801623895","doi":"https://doi.org/10.1109/iscas.2018.8350995","mag":"2801623895"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2018.8350995","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2018.8350995","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102929760","display_name":"Chih-Wei Tsai","orcid":"https://orcid.org/0000-0002-0315-7607"},"institutions":[{"id":"https://openalex.org/I22265921","display_name":"National Central University","ror":"https://ror.org/00944ve71","country_code":"TW","type":"education","lineage":["https://openalex.org/I22265921"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chih-Wei Tsai","raw_affiliation_strings":["Department of Electrical Engineering, National Central University, Zhongli Dist., Taoyuan City, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Central University, Zhongli Dist., Taoyuan City, Taiwan","institution_ids":["https://openalex.org/I22265921"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101946608","display_name":"Yu\u2010Ting Chiu","orcid":"https://orcid.org/0000-0001-7130-5141"},"institutions":[{"id":"https://openalex.org/I22265921","display_name":"National Central University","ror":"https://ror.org/00944ve71","country_code":"TW","type":"education","lineage":["https://openalex.org/I22265921"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yu-Ting Chiu","raw_affiliation_strings":["Department of Electrical Engineering, National Central University, Zhongli Dist., Taoyuan City, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Central University, Zhongli Dist., Taoyuan City, Taiwan","institution_ids":["https://openalex.org/I22265921"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029344336","display_name":"Yo\u2010Hao Tu","orcid":null},"institutions":[{"id":"https://openalex.org/I22265921","display_name":"National Central University","ror":"https://ror.org/00944ve71","country_code":"TW","type":"education","lineage":["https://openalex.org/I22265921"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yo-Hao Tu","raw_affiliation_strings":["Department of Electrical Engineering, National Central University, Zhongli Dist., Taoyuan City, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Central University, Zhongli Dist., Taoyuan City, Taiwan","institution_ids":["https://openalex.org/I22265921"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101981427","display_name":"Kuo\u2010Hsing Cheng","orcid":"https://orcid.org/0000-0002-0997-5264"},"institutions":[{"id":"https://openalex.org/I22265921","display_name":"National Central University","ror":"https://ror.org/00944ve71","country_code":"TW","type":"education","lineage":["https://openalex.org/I22265921"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Kuo-Hsing Cheng","raw_affiliation_strings":["Department of Electrical Engineering, National Central University, Zhongli Dist., Taoyuan City, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Central University, Zhongli Dist., Taoyuan City, Taiwan","institution_ids":["https://openalex.org/I22265921"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I22265921"],"apc_list":null,"apc_paid":null,"fwci":1.9482,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.84513817,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12495","display_name":"Electrostatic Discharge in Electronics","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.7420911192893982},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.614433765411377},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5151394605636597},{"id":"https://openalex.org/keywords/quadrature","display_name":"Quadrature (astronomy)","score":0.508356511592865},{"id":"https://openalex.org/keywords/detector","display_name":"Detector","score":0.5007171630859375},{"id":"https://openalex.org/keywords/dynamic-range","display_name":"Dynamic range","score":0.488252192735672},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4777061939239502},{"id":"https://openalex.org/keywords/delay-locked-loop","display_name":"Delay-locked loop","score":0.4366300106048584},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.42749613523483276},{"id":"https://openalex.org/keywords/duty-cycle","display_name":"Duty cycle","score":0.41224151849746704},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.348845511674881},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3039059042930603},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17184925079345703},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.12839272618293762}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.7420911192893982},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.614433765411377},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5151394605636597},{"id":"https://openalex.org/C62869609","wikidata":"https://www.wikidata.org/wiki/Q28137","display_name":"Quadrature (astronomy)","level":2,"score":0.508356511592865},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.5007171630859375},{"id":"https://openalex.org/C87133666","wikidata":"https://www.wikidata.org/wiki/Q1161699","display_name":"Dynamic range","level":2,"score":0.488252192735672},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4777061939239502},{"id":"https://openalex.org/C190462668","wikidata":"https://www.wikidata.org/wiki/Q492265","display_name":"Delay-locked loop","level":4,"score":0.4366300106048584},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.42749613523483276},{"id":"https://openalex.org/C199822604","wikidata":"https://www.wikidata.org/wiki/Q557120","display_name":"Duty cycle","level":3,"score":0.41224151849746704},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.348845511674881},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3039059042930603},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17184925079345703},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.12839272618293762}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2018.8350995","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2018.8350995","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8500000238418579,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W2021452744","https://openalex.org/W2052293768","https://openalex.org/W2162720403","https://openalex.org/W2166287616","https://openalex.org/W2281903249","https://openalex.org/W2493823165"],"related_works":["https://openalex.org/W2354050524","https://openalex.org/W2083878249","https://openalex.org/W2401743820","https://openalex.org/W3177439118","https://openalex.org/W4295813049","https://openalex.org/W2066428821","https://openalex.org/W2119216036","https://openalex.org/W2389594899","https://openalex.org/W2144109350","https://openalex.org/W2976219355"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"an":[3],"all-digital":[4],"delay-locked":[5],"loop":[6],"(ADDLL)":[7],"with":[8,66,93],"wide":[9],"operating":[10,52,82],"range":[11,83],"for":[12],"double":[13],"data":[14],"rate":[15],"synchronous":[16],"dynamic":[17],"random":[18],"access":[19],"memory":[20],"(DDR":[21],"SDRAM)":[22],"application.":[23],"To":[24,54],"avoid":[25],"the":[26,34,51,56,81],"quadrature":[27,102],"phase":[28],"error":[29,105],"caused":[30],"by":[31],"harmonic":[32,42],"lock,":[33],"proposed":[35,57,85],"auto-calibrated":[36],"edge":[37],"detector":[38],"(ACED)":[39],"utilizes":[40],"novel":[41],"lock":[43],"detection":[44],"technique":[45,48],"and":[46],"auto-calibration":[47],"to":[49,90],"extend":[50],"range.":[53],"verify,":[55],"circuit":[58],"was":[59],"fabricated":[60],"using":[61],"90-nm":[62],"standard":[63],"CMOS":[64],"process":[65],"a":[67],"1-V":[68],"supply":[69],"voltage.":[70],"The":[71,77,101],"core":[72],"area":[73],"is":[74,87,106],"0.089":[75],"mm2.":[76],"measurement":[78],"result":[79],"shows":[80],"of":[84],"ADDLL":[86],"from":[88],"0.1":[89],"2.7":[91],"GHz":[92],"peak-to-peak":[94],"period":[95],"jitter":[96],"less":[97,107],"than":[98,108],"5":[99],"ps.":[100],"output":[103],"duty-cycle":[104],"1.9%.":[109]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
