{"id":"https://openalex.org/W2759388977","doi":"https://doi.org/10.1109/iscas.2017.8050748","title":"Using dynamic dependence analysis to improve the quality of high-level synthesis designs","display_name":"Using dynamic dependence analysis to improve the quality of high-level synthesis designs","publication_year":2017,"publication_date":"2017-05-01","ids":{"openalex":"https://openalex.org/W2759388977","doi":"https://doi.org/10.1109/iscas.2017.8050748","mag":"2759388977"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2017.8050748","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2017.8050748","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5006019699","display_name":"Rafael Garibotti","orcid":"https://orcid.org/0000-0002-7307-0128"},"institutions":[{"id":"https://openalex.org/I2801851002","display_name":"Harvard University Press","ror":"https://ror.org/006v7bf86","country_code":"US","type":"other","lineage":["https://openalex.org/I136199984","https://openalex.org/I2801851002"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Rafael Garibotti","raw_affiliation_strings":["Harvard University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Harvard University","institution_ids":["https://openalex.org/I2801851002"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5089173037","display_name":"Brandon Reagen","orcid":"https://orcid.org/0000-0002-1932-2750"},"institutions":[{"id":"https://openalex.org/I2801851002","display_name":"Harvard University Press","ror":"https://ror.org/006v7bf86","country_code":"US","type":"other","lineage":["https://openalex.org/I136199984","https://openalex.org/I2801851002"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Brandon Reagen","raw_affiliation_strings":["Harvard University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Harvard University","institution_ids":["https://openalex.org/I2801851002"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008683881","display_name":"Yakun Sophia Shao","orcid":"https://orcid.org/0000-0003-1811-5407"},"institutions":[{"id":"https://openalex.org/I2801851002","display_name":"Harvard University Press","ror":"https://ror.org/006v7bf86","country_code":"US","type":"other","lineage":["https://openalex.org/I136199984","https://openalex.org/I2801851002"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yakun Sophia Shao","raw_affiliation_strings":["Harvard University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Harvard University","institution_ids":["https://openalex.org/I2801851002"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043327132","display_name":"Gu-Yeon Wei","orcid":"https://orcid.org/0000-0001-5730-9904"},"institutions":[{"id":"https://openalex.org/I2801851002","display_name":"Harvard University Press","ror":"https://ror.org/006v7bf86","country_code":"US","type":"other","lineage":["https://openalex.org/I136199984","https://openalex.org/I2801851002"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Gu-Yeon Wei","raw_affiliation_strings":["Harvard University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Harvard University","institution_ids":["https://openalex.org/I2801851002"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5026496503","display_name":"David Brooks","orcid":"https://orcid.org/0000-0002-0662-7889"},"institutions":[{"id":"https://openalex.org/I2801851002","display_name":"Harvard University Press","ror":"https://ror.org/006v7bf86","country_code":"US","type":"other","lineage":["https://openalex.org/I136199984","https://openalex.org/I2801851002"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"David Brooks","raw_affiliation_strings":["Harvard University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Harvard University","institution_ids":["https://openalex.org/I2801851002"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I2801851002"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.8456839323043823},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7951074242591858},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.7596822381019592},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.6755259037017822},{"id":"https://openalex.org/keywords/static-analysis","display_name":"Static analysis","score":0.5255564451217651},{"id":"https://openalex.org/keywords/shared-resource","display_name":"Shared resource","score":0.47020962834358215},{"id":"https://openalex.org/keywords/compile-time","display_name":"Compile time","score":0.4450134336948395},{"id":"https://openalex.org/keywords/quality","display_name":"Quality (philosophy)","score":0.4215690493583679},{"id":"https://openalex.org/keywords/register-transfer-level","display_name":"Register-transfer level","score":0.4172731041908264},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.40427935123443604},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.35439532995224},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3437243402004242},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3376222848892212},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.33447372913360596},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2591327726840973},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.19668635725975037},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.16841813921928406},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.15241560339927673}],"concepts":[{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.8456839323043823},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7951074242591858},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.7596822381019592},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.6755259037017822},{"id":"https://openalex.org/C97686452","wikidata":"https://www.wikidata.org/wiki/Q7604153","display_name":"Static analysis","level":2,"score":0.5255564451217651},{"id":"https://openalex.org/C51332947","wikidata":"https://www.wikidata.org/wiki/Q1172305","display_name":"Shared resource","level":2,"score":0.47020962834358215},{"id":"https://openalex.org/C200833197","wikidata":"https://www.wikidata.org/wiki/Q333707","display_name":"Compile time","level":3,"score":0.4450134336948395},{"id":"https://openalex.org/C2779530757","wikidata":"https://www.wikidata.org/wiki/Q1207505","display_name":"Quality (philosophy)","level":2,"score":0.4215690493583679},{"id":"https://openalex.org/C34854456","wikidata":"https://www.wikidata.org/wiki/Q1484552","display_name":"Register-transfer level","level":4,"score":0.4172731041908264},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.40427935123443604},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.35439532995224},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3437243402004242},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3376222848892212},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.33447372913360596},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2591327726840973},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.19668635725975037},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.16841813921928406},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.15241560339927673},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2017.8050748","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2017.8050748","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Decent work and economic growth","id":"https://metadata.un.org/sdg/8","score":0.5799999833106995}],"awards":[],"funders":[{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"},{"id":"https://openalex.org/F4320322025","display_name":"Conselho Nacional de Desenvolvimento Cient\u00edfico e Tecnol\u00f3gico","ror":"https://ror.org/03swz6y49"},{"id":"https://openalex.org/F4320332180","display_name":"Defense Advanced Research Projects Agency","ror":"https://ror.org/02caytj08"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1972821547","https://openalex.org/W1996464317","https://openalex.org/W2012114780","https://openalex.org/W2012627971","https://openalex.org/W2026383319","https://openalex.org/W2029299120","https://openalex.org/W2064141391","https://openalex.org/W2103302995","https://openalex.org/W2131065168","https://openalex.org/W2134931573","https://openalex.org/W2147088458","https://openalex.org/W2162385899","https://openalex.org/W4230301105","https://openalex.org/W4233035441","https://openalex.org/W4239489018","https://openalex.org/W4255702000"],"related_works":["https://openalex.org/W2064431979","https://openalex.org/W2103548574","https://openalex.org/W2064970225","https://openalex.org/W4241206086","https://openalex.org/W4297908618","https://openalex.org/W2109697164","https://openalex.org/W2765641823","https://openalex.org/W2543290882","https://openalex.org/W2196541947","https://openalex.org/W1528726807"],"abstract_inverted_index":{"High-Level":[0],"Synthesis":[1],"(HLS)":[2],"tools":[3],"that":[4,83],"compile":[5],"algorithms":[6],"written":[7],"in":[8,31,37],"high-level":[9],"languages":[10],"into":[11],"register-transfer":[12],"level":[13],"implementations":[14,30],"can":[15,91],"significantly":[16],"improve":[17],"design":[18],"productivity":[19],"and":[20],"lower":[21],"engineering":[22],"cost.":[23],"However,":[24],"HLS-generated":[25],"designs":[26,59,90],"still":[27],"lag":[28],"handwritten":[29],"a":[32,72],"number":[33],"of":[34,41,51,75,95],"areas,":[35],"particularly":[36],"the":[38,49,88,103],"efficient":[39],"allocation":[40],"hardware":[42],"resources.":[43],"In":[44],"this":[45],"work,":[46],"we":[47],"propose":[48],"use":[50],"dynamic":[52,85],"dependence":[53,86],"analysis":[54],"to":[55],"generate":[56],"higher":[57],"quality":[58],"using":[60],"existing":[61],"HLS":[62,105],"tools.":[63],"We":[64,81],"focus":[65],"on":[66,78],"resource":[67,97],"sharing":[68],"for":[69],"compute-intensive":[70],"workloads,":[71],"major":[73],"limitation":[74],"relying":[76],"only":[77],"static":[79],"analysis.":[80],"demonstrate":[82],"with":[84],"analysis,":[87],"synthesized":[89],"achieve":[92],"an":[93],"order":[94],"magnitude":[96],"reduction":[98],"without":[99],"performance":[100],"loss":[101],"over":[102],"state-of-the-art":[104],"solutions.":[106]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2018,"cited_by_count":2}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
