{"id":"https://openalex.org/W2758427693","doi":"https://doi.org/10.1109/iscas.2017.8050632","title":"A two-stage variation-aware task mapping scheme for fault-tolerant multi-core Network-on-Chips","display_name":"A two-stage variation-aware task mapping scheme for fault-tolerant multi-core Network-on-Chips","publication_year":2017,"publication_date":"2017-05-01","ids":{"openalex":"https://openalex.org/W2758427693","doi":"https://doi.org/10.1109/iscas.2017.8050632","mag":"2758427693"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2017.8050632","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2017.8050632","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101946898","display_name":"Lei Zhang","orcid":"https://orcid.org/0000-0002-7885-6090"},"institutions":[{"id":"https://openalex.org/I125839683","display_name":"Beijing Institute of Technology","ror":"https://ror.org/01skt4w74","country_code":"CN","type":"education","lineage":["https://openalex.org/I125839683","https://openalex.org/I890469752"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Lei Zhang","raw_affiliation_strings":["School of Information and Electronics, Beijing Institute of Technology, Beijing, China"],"affiliations":[{"raw_affiliation_string":"School of Information and Electronics, Beijing Institute of Technology, Beijing, China","institution_ids":["https://openalex.org/I125839683"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101483320","display_name":"Jianxun Yang","orcid":"https://orcid.org/0000-0001-9905-0961"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jianxun Yang","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089","https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5069616003","display_name":"Chengbo Xue","orcid":"https://orcid.org/0000-0002-4786-2586"},"institutions":[{"id":"https://openalex.org/I125839683","display_name":"Beijing Institute of Technology","ror":"https://ror.org/01skt4w74","country_code":"CN","type":"education","lineage":["https://openalex.org/I125839683","https://openalex.org/I890469752"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Chengbo Xue","raw_affiliation_strings":["School of Information and Electronics, Beijing Institute of Technology, Beijing, China"],"affiliations":[{"raw_affiliation_string":"School of Information and Electronics, Beijing Institute of Technology, Beijing, China","institution_ids":["https://openalex.org/I125839683"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064784628","display_name":"Yue Ma","orcid":"https://orcid.org/0000-0001-9906-2372"},"institutions":[{"id":"https://openalex.org/I125839683","display_name":"Beijing Institute of Technology","ror":"https://ror.org/01skt4w74","country_code":"CN","type":"education","lineage":["https://openalex.org/I125839683","https://openalex.org/I890469752"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yue Ma","raw_affiliation_strings":["School of Information and Electronics, Beijing Institute of Technology, Beijing, China"],"affiliations":[{"raw_affiliation_string":"School of Information and Electronics, Beijing Institute of Technology, Beijing, China","institution_ids":["https://openalex.org/I125839683"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5044419947","display_name":"Shan Cao","orcid":"https://orcid.org/0000-0003-3713-8671"},"institutions":[{"id":"https://openalex.org/I125839683","display_name":"Beijing Institute of Technology","ror":"https://ror.org/01skt4w74","country_code":"CN","type":"education","lineage":["https://openalex.org/I125839683","https://openalex.org/I890469752"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shan Cao","raw_affiliation_strings":["School of Information and Electronics, Beijing Institute of Technology, Beijing, China"],"affiliations":[{"raw_affiliation_string":"School of Information and Electronics, Beijing Institute of Technology, Beijing, China","institution_ids":["https://openalex.org/I125839683"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5101946898"],"corresponding_institution_ids":["https://openalex.org/I125839683"],"apc_list":null,"apc_paid":null,"fwci":1.036,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.80279513,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9926000237464905,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9807000160217285,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6927207112312317},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.6320639252662659},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.5832191109657288},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.5543476939201355},{"id":"https://openalex.org/keywords/task","display_name":"Task (project management)","score":0.5234995484352112},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.522179365158081},{"id":"https://openalex.org/keywords/core","display_name":"Core (optical fiber)","score":0.4986999034881592},{"id":"https://openalex.org/keywords/network-topology","display_name":"Network topology","score":0.49773433804512024},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.45597729086875916},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.41526514291763306},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.38844358921051025},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.3814549148082733},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.2997732162475586},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.16441893577575684},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13476482033729553},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.09941539168357849}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6927207112312317},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.6320639252662659},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.5832191109657288},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.5543476939201355},{"id":"https://openalex.org/C2780451532","wikidata":"https://www.wikidata.org/wiki/Q759676","display_name":"Task (project management)","level":2,"score":0.5234995484352112},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.522179365158081},{"id":"https://openalex.org/C2164484","wikidata":"https://www.wikidata.org/wiki/Q5170150","display_name":"Core (optical fiber)","level":2,"score":0.4986999034881592},{"id":"https://openalex.org/C199845137","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Network topology","level":2,"score":0.49773433804512024},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.45597729086875916},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.41526514291763306},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.38844358921051025},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.3814549148082733},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.2997732162475586},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.16441893577575684},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13476482033729553},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.09941539168357849},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2017.8050632","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2017.8050632","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W612784192","https://openalex.org/W2057343009","https://openalex.org/W2058338151","https://openalex.org/W2081186910","https://openalex.org/W2142386205","https://openalex.org/W2150283124","https://openalex.org/W2160683277","https://openalex.org/W4247388151","https://openalex.org/W4250661686","https://openalex.org/W6664949214"],"related_works":["https://openalex.org/W2086397253","https://openalex.org/W2133122801","https://openalex.org/W600422426","https://openalex.org/W2007156430","https://openalex.org/W2170882281","https://openalex.org/W3081478936","https://openalex.org/W2291648581","https://openalex.org/W1539291615","https://openalex.org/W3015089381","https://openalex.org/W1721591296"],"abstract_inverted_index":{"With":[0],"technology":[1],"scaling,":[2],"process":[3],"variations":[4],"influence":[5],"the":[6,32,101,108,112,118],"performance,":[7],"power":[8],"and":[9,15,83,95,117],"reliability":[10],"significantly,":[11],"especially":[12],"for":[13,46],"multi-core":[14,19,47],"many-core":[16],"systems.":[17],"Faulty-tolerant":[18],"architectures":[20],"are":[21,86,98],"paid":[22],"widely":[23],"attention":[24],"to,":[25],"which":[26],"integrate":[27],"redundant":[28,50],"cores":[29,85],"to":[30,61,67,88],"improve":[31],"manufacturing":[33],"yield.":[34],"In":[35],"this":[36],"paper,":[37],"a":[38,53,69],"two-stage":[39],"variation-aware":[40],"task":[41,56,64],"mapping":[42,57,65,79],"scheme":[43],"is":[44,59,81,121],"proposed":[45,102,109],"NoCs":[48],"with":[49],"cores.":[51,91],"Firstly,":[52],"static":[54],"genetic":[55],"algorithm":[58],"presented":[60],"generate":[62],"multiple":[63],"solutions":[66],"cover":[68],"maximum":[70],"range":[71],"of":[72],"chips.":[73],"Then,":[74],"at":[75],"runtime,":[76],"one":[77],"optimal":[78],"solution":[80],"selected,":[82],"logical":[84],"mapped":[87],"physical":[89],"available":[90],"Both":[92],"core":[93],"asymmetry":[94],"topology":[96],"changes":[97],"considered":[99],"in":[100],"approach.":[103],"Experimental":[104],"results":[105],"demonstrate":[106],"that":[107],"approach":[110],"increases":[111],"performance":[113],"yield":[114],"by":[115,123],"56%,":[116],"communication":[119],"cost":[120],"reduced":[122],"11.3%.":[124]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
