{"id":"https://openalex.org/W2758460894","doi":"https://doi.org/10.1109/iscas.2017.8050318","title":"Fast cycle-accurate compile based simulator for reconfigurable processor","display_name":"Fast cycle-accurate compile based simulator for reconfigurable processor","publication_year":2017,"publication_date":"2017-05-01","ids":{"openalex":"https://openalex.org/W2758460894","doi":"https://doi.org/10.1109/iscas.2017.8050318","mag":"2758460894"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2017.8050318","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2017.8050318","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5031971317","display_name":"Narasinga Rao Miniskar","orcid":"https://orcid.org/0000-0001-8259-8891"},"institutions":[{"id":"https://openalex.org/I4210139030","display_name":"Samsung (India)","ror":"https://ror.org/04cpx2569","country_code":"IN","type":"company","lineage":["https://openalex.org/I2250650973","https://openalex.org/I4210139030"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Narasinga Rao Miniskar","raw_affiliation_strings":["DMC, Samsung R&D Institute India, Bangalore, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"DMC, Samsung R&D Institute India, Bangalore, India","institution_ids":["https://openalex.org/I4210139030"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085051959","display_name":"Raj Narayana Gadde","orcid":null},"institutions":[{"id":"https://openalex.org/I4210139030","display_name":"Samsung (India)","ror":"https://ror.org/04cpx2569","country_code":"IN","type":"company","lineage":["https://openalex.org/I2250650973","https://openalex.org/I4210139030"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Raj Narayana Gadde","raw_affiliation_strings":["DMC, Samsung R&D Institute India, Bangalore, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"DMC, Samsung R&D Institute India, Bangalore, India","institution_ids":["https://openalex.org/I4210139030"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051479006","display_name":"Young-chul Rams Cho","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Young-chul Rams Cho","raw_affiliation_strings":["DMC R&D, Samsung Electronics, Media Processing Lab, Suwon-si, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"DMC R&D, Samsung Electronics, Media Processing Lab, Suwon-si, Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5014007913","display_name":"Sukjin Kim","orcid":"https://orcid.org/0000-0003-2232-2038"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Sukjin Kim","raw_affiliation_strings":["DMC R&D, Samsung Electronics, Media Processing Lab, Suwon-si, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"DMC R&D, Samsung Electronics, Media Processing Lab, Suwon-si, Korea","institution_ids":["https://openalex.org/I2250650973"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.14175495,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-long-instruction-word","display_name":"Very long instruction word","score":0.8887645602226257},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8861991167068481},{"id":"https://openalex.org/keywords/x86","display_name":"x86","score":0.546410083770752},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5425522923469543},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.5152307152748108},{"id":"https://openalex.org/keywords/simd","display_name":"SIMD","score":0.43432703614234924},{"id":"https://openalex.org/keywords/codec","display_name":"Codec","score":0.4229179620742798},{"id":"https://openalex.org/keywords/just-in-time-compilation","display_name":"Just-in-time compilation","score":0.4186609387397766},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.38740241527557373},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.37853312492370605},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.310141384601593},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.2801254987716675},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.14206594228744507}],"concepts":[{"id":"https://openalex.org/C170595534","wikidata":"https://www.wikidata.org/wiki/Q249743","display_name":"Very long instruction word","level":2,"score":0.8887645602226257},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8861991167068481},{"id":"https://openalex.org/C170723468","wikidata":"https://www.wikidata.org/wiki/Q182933","display_name":"x86","level":3,"score":0.546410083770752},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5425522923469543},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.5152307152748108},{"id":"https://openalex.org/C150552126","wikidata":"https://www.wikidata.org/wiki/Q339387","display_name":"SIMD","level":2,"score":0.43432703614234924},{"id":"https://openalex.org/C161765866","wikidata":"https://www.wikidata.org/wiki/Q184748","display_name":"Codec","level":2,"score":0.4229179620742798},{"id":"https://openalex.org/C76782552","wikidata":"https://www.wikidata.org/wiki/Q110546","display_name":"Just-in-time compilation","level":3,"score":0.4186609387397766},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.38740241527557373},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.37853312492370605},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.310141384601593},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.2801254987716675},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.14206594228744507}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2017.8050318","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2017.8050318","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.4699999988079071,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1967211187","https://openalex.org/W1978586245","https://openalex.org/W2035473608","https://openalex.org/W2072737419","https://openalex.org/W2086403102","https://openalex.org/W2123412205","https://openalex.org/W2131493012","https://openalex.org/W2141711229","https://openalex.org/W2169552926","https://openalex.org/W3143978497","https://openalex.org/W4231002400","https://openalex.org/W4243690139","https://openalex.org/W4244854666","https://openalex.org/W4255933379"],"related_works":["https://openalex.org/W2129537883","https://openalex.org/W2115688358","https://openalex.org/W2108658553","https://openalex.org/W1503212777","https://openalex.org/W2072728786","https://openalex.org/W2911551207","https://openalex.org/W4225987401","https://openalex.org/W2146636354","https://openalex.org/W4236526691","https://openalex.org/W2066442232"],"abstract_inverted_index":{"Reconfigurable":[0,51],"Processor":[1],"(RP)":[2],"provides":[3],"great":[4],"flexibility":[5],"of":[6,57,61,75,96,99,151,203,233],"hardware":[7],"re-configurability":[8],"through":[9],"software":[10],"solution":[11],"for":[12,94,145],"high-performance":[13],"computing.":[14],"RP":[15,37,63,106,179],"is":[16,88,185,214,228],"used":[17],"as":[18],"a":[19,65,139],"DSP":[20],"in":[21,39,119,125,154,160,182,209,239],"Samsung":[22],"DTV":[23],"and":[24,32,47,67,77,122,157,195,206,242],"Camera":[25],"to":[26,71,78,90,177,190,200,217],"run":[27],"the":[28,55,62,73,80,92,191,204,210,231],"Audio,":[29],"Video":[30],"codecs":[31],"image":[33],"quality":[34],"enhancement":[35],"algorithms.":[36],"runs":[38],"two":[40],"modes:":[41],"VLIW":[42,126,161,183,205,241],"(Very":[43],"Large":[44],"Instruction":[45],"Word)":[46],"CGRA":[48,120,155,243],"(Coarse":[49],"Grain":[50],"Array).":[52],"To":[53],"minimize":[54],"time-to-market":[56],"products,":[58],"application":[59,218],"developers":[60],"require":[64],"fast":[66,86,140],"cycle-accurate":[68,143,201],"profiling-enabled":[69],"simulator":[70,144],"verify":[72,91],"functionality":[74],"applications":[76],"optimize":[79],"hot-spots":[81],"(performance":[82],"critical":[83],"codes).":[84],"Further,":[85],"simulation":[87,149,174,226],"necessary":[89],"functionalities":[93],"certification":[95],"various":[97],"standards":[98],"multimedia":[100],"(DivX,":[101],"Dolby,":[102],"etc.).":[103],"The":[104,224],"state-of-the-art":[105,192],"simulators":[107],"are":[108],"very":[109],"slow":[110],"running":[111,128,219],"at":[112,133],"2":[113],"MIPS":[114,124,153,159],"(Million":[115],"instructions":[116],"per":[117],"second)":[118],"mode":[121,156,162,184],"4":[123],"mode,":[127],"on":[129,221],"x86":[130],"host":[131],"processor":[132],"3.4":[134],"GHz.":[135],"We":[136],"propose":[137],"FastSim,":[138],"compile":[141],"based":[142],"RP,":[146],"which":[147],"yields":[148],"speed":[150,213,227],"900":[152],"1600":[158],"with":[163,230],">":[164],"99.5%":[165],"core":[166],"cycle":[167],"accuracy.":[168],"Thus,":[169],"FastSim":[170,181,212],"enables":[171],"~400x":[172],"faster":[173,187,197,225],"when":[175,188,198],"compared":[176,189,199],"existing":[178],"simulators.":[180],"2x":[186],"functional":[193],"simulators,":[194,202],"16x":[196],"RISC":[207],"processors":[208],"industry.":[211],"also":[215],"comparable":[216],"time":[220],"native":[222],"x86.":[223],"achieved":[229],"use":[232],"an":[234],"innovative":[235],"maximal":[236],"static":[237],"analysis":[238],"both":[240],"modes.":[244]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
