{"id":"https://openalex.org/W2517094076","doi":"https://doi.org/10.1109/iscas.2016.7527368","title":"Time integrator for mixed-mode signal processing","display_name":"Time integrator for mixed-mode signal processing","publication_year":2016,"publication_date":"2016-05-01","ids":{"openalex":"https://openalex.org/W2517094076","doi":"https://doi.org/10.1109/iscas.2016.7527368","mag":"2517094076"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2016.7527368","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2016.7527368","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101852631","display_name":"Young Jun Park","orcid":"https://orcid.org/0000-0002-1461-5597"},"institutions":[{"id":"https://openalex.org/I530967","display_name":"Toronto Metropolitan University","ror":"https://ror.org/05g13zd79","country_code":"CA","type":"education","lineage":["https://openalex.org/I530967"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Young Jun Park","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Ryerson University, Toronto, ON, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Ryerson University, Toronto, ON, Canada","institution_ids":["https://openalex.org/I530967"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067922746","display_name":"Durand Jarrett-Amor","orcid":"https://orcid.org/0000-0003-3162-3422"},"institutions":[{"id":"https://openalex.org/I530967","display_name":"Toronto Metropolitan University","ror":"https://ror.org/05g13zd79","country_code":"CA","type":"education","lineage":["https://openalex.org/I530967"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Durand Jarrett-Amor","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Ryerson University, Toronto, ON, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Ryerson University, Toronto, ON, Canada","institution_ids":["https://openalex.org/I530967"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100698597","display_name":"Fei Yuan","orcid":"https://orcid.org/0000-0001-7758-5455"},"institutions":[{"id":"https://openalex.org/I530967","display_name":"Toronto Metropolitan University","ror":"https://ror.org/05g13zd79","country_code":"CA","type":"education","lineage":["https://openalex.org/I530967"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Fei Yuan","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Ryerson University, Toronto, ON, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Ryerson University, Toronto, ON, Canada","institution_ids":["https://openalex.org/I530967"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5101852631"],"corresponding_institution_ids":["https://openalex.org/I530967"],"apc_list":null,"apc_paid":null,"fwci":0.9371,"has_fulltext":false,"cited_by_count":20,"citation_normalized_percentile":{"value":0.78126412,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"826","last_page":"829"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9969000220298767,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/integrator","display_name":"Integrator","score":0.9628549814224243},{"id":"https://openalex.org/keywords/passive-integrator-circuit","display_name":"Passive integrator circuit","score":0.7765507698059082},{"id":"https://openalex.org/keywords/integrating-adc","display_name":"Integrating ADC","score":0.7515212297439575},{"id":"https://openalex.org/keywords/op-amp-integrator","display_name":"Op amp integrator","score":0.7481637001037598},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7212790846824646},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.6605663299560547},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.547739565372467},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5223042368888855},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4848814904689789},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.43875256180763245},{"id":"https://openalex.org/keywords/rise-time","display_name":"Rise time","score":0.43698593974113464},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3935953378677368},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3071873188018799},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.2448539435863495},{"id":"https://openalex.org/keywords/operational-amplifier","display_name":"Operational amplifier","score":0.15726107358932495},{"id":"https://openalex.org/keywords/rc-circuit","display_name":"RC circuit","score":0.15395504236221313},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.12483271956443787}],"concepts":[{"id":"https://openalex.org/C79518650","wikidata":"https://www.wikidata.org/wiki/Q2081431","display_name":"Integrator","level":3,"score":0.9628549814224243},{"id":"https://openalex.org/C30839866","wikidata":"https://www.wikidata.org/wiki/Q918242","display_name":"Passive integrator circuit","level":5,"score":0.7765507698059082},{"id":"https://openalex.org/C140020054","wikidata":"https://www.wikidata.org/wiki/Q6043185","display_name":"Integrating ADC","level":5,"score":0.7515212297439575},{"id":"https://openalex.org/C159606330","wikidata":"https://www.wikidata.org/wiki/Q3799294","display_name":"Op amp integrator","level":5,"score":0.7481637001037598},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7212790846824646},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.6605663299560547},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.547739565372467},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5223042368888855},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4848814904689789},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.43875256180763245},{"id":"https://openalex.org/C47586369","wikidata":"https://www.wikidata.org/wiki/Q377672","display_name":"Rise time","level":3,"score":0.43698593974113464},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3935953378677368},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3071873188018799},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.2448539435863495},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.15726107358932495},{"id":"https://openalex.org/C39394816","wikidata":"https://www.wikidata.org/wiki/Q939318","display_name":"RC circuit","level":4,"score":0.15395504236221313},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.12483271956443787},{"id":"https://openalex.org/C100329506","wikidata":"https://www.wikidata.org/wiki/Q336439","display_name":"\u0106uk converter","level":4,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2016.7527368","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2016.7527368","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8500000238418579,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W1493319681","https://openalex.org/W1579034116","https://openalex.org/W1970418012","https://openalex.org/W2096434843","https://openalex.org/W2105980164","https://openalex.org/W2108324407","https://openalex.org/W2110245858","https://openalex.org/W2134926592"],"related_works":["https://openalex.org/W2143449266","https://openalex.org/W2388167301","https://openalex.org/W2130119779","https://openalex.org/W2090668620","https://openalex.org/W2065081920","https://openalex.org/W2368860006","https://openalex.org/W2058962136","https://openalex.org/W2517094076","https://openalex.org/W2032779953","https://openalex.org/W2118675504"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,22,86,92],"new":[4],"time":[5,13,18,33,41,65,83,98],"integrator":[6,14,34,42,66,84],"for":[7],"mixed-mode":[8],"signal":[9],"processing.":[10],"The":[11,49,63],"proposed":[12,32,64],"consists":[15],"of":[16,30,51,88],"two":[17],"adders":[19],"realized":[20],"using":[21],"time-to-voltage":[23],"and":[24,57,100],"voltage-to-time":[25],"conversion":[26],"mechanism.":[27],"All":[28],"transistors":[29],"the":[31,40,82],"operate":[35],"in":[36,61,70],"an":[37,71],"on/off":[38],"mode,":[39],"is":[43,59],"fully":[44],"compatible":[45],"with":[46,91,104],"digital-oriented":[47],"CMOS.":[48],"effect":[50],"nonidealities":[52],"including":[53],"charge":[54],"injection,":[55],"leakage,":[56],"jitter":[58],"examined":[60],"detail.":[62],"has":[67],"been":[68],"designed":[69],"IBM":[72],"130":[73],"nm":[74],"1.2V":[75],"CMOS":[76],"technology.":[77],"Simulation":[78],"results":[79],"show":[80],"that":[81],"provides":[85],"gain":[87],"21":[89],"dB":[90],"317":[93],"kHz":[94],"30":[95],"ps":[96],"peak-to-peak":[97],"input,":[99],"consumes":[101],"101.6":[102],"\u03bcW":[103],"25":[105],"MHz":[106],"sampling":[107],"clock.":[108]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":5},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}