{"id":"https://openalex.org/W1538087805","doi":"https://doi.org/10.1109/iscas.2015.7169331","title":"Design of a digital harmonic-cancelling sine-wave synthesizer with 100 MHz output frequency, 43.5 dB SFDR, and 2.26 mW power","display_name":"Design of a digital harmonic-cancelling sine-wave synthesizer with 100 MHz output frequency, 43.5 dB SFDR, and 2.26 mW power","publication_year":2015,"publication_date":"2015-05-01","ids":{"openalex":"https://openalex.org/W1538087805","doi":"https://doi.org/10.1109/iscas.2015.7169331","mag":"1538087805"},"language":"en","primary_location":{"id":"doi:10.1109/iscas.2015.7169331","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2015.7169331","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5039727177","display_name":"Pasindu Aluthwala","orcid":"https://orcid.org/0000-0002-2561-889X"},"institutions":[{"id":"https://openalex.org/I31746571","display_name":"UNSW Sydney","ror":"https://ror.org/03r8z3t63","country_code":"AU","type":"education","lineage":["https://openalex.org/I31746571"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"Pasindu Aluthwala","raw_affiliation_strings":["The University of New South Wales, NSW, Australia","The University of New South Wales, NSW, Australia 2052"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The University of New South Wales, NSW, Australia","institution_ids":["https://openalex.org/I31746571"]},{"raw_affiliation_string":"The University of New South Wales, NSW, Australia 2052","institution_ids":["https://openalex.org/I31746571"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001267886","display_name":"Neil Weste","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Neil Weste","raw_affiliation_strings":["NHEW R&D Pty Ltd"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"NHEW R&D Pty Ltd","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043623579","display_name":"Andrew Adams","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Andrew Adams","raw_affiliation_strings":["Australia","Broadcom, Australia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Australia","institution_ids":[]},{"raw_affiliation_string":"Broadcom, Australia","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000792192","display_name":"Torsten Lehmann","orcid":null},"institutions":[{"id":"https://openalex.org/I31746571","display_name":"UNSW Sydney","ror":"https://ror.org/03r8z3t63","country_code":"AU","type":"education","lineage":["https://openalex.org/I31746571"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"Torsten Lehmann","raw_affiliation_strings":["The University of New South Wales, NSW, Australia","The University of New South Wales, NSW, Australia 2052"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The University of New South Wales, NSW, Australia","institution_ids":["https://openalex.org/I31746571"]},{"raw_affiliation_string":"The University of New South Wales, NSW, Australia 2052","institution_ids":["https://openalex.org/I31746571"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5030042327","display_name":"Sri Parameswaran","orcid":"https://orcid.org/0000-0003-0435-9080"},"institutions":[{"id":"https://openalex.org/I31746571","display_name":"UNSW Sydney","ror":"https://ror.org/03r8z3t63","country_code":"AU","type":"education","lineage":["https://openalex.org/I31746571"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"Sri Parameswaran","raw_affiliation_strings":["The University of New South Wales, NSW, Australia","The University of New South Wales, NSW, Australia 2052"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The University of New South Wales, NSW, Australia","institution_ids":["https://openalex.org/I31746571"]},{"raw_affiliation_string":"The University of New South Wales, NSW, Australia 2052","institution_ids":["https://openalex.org/I31746571"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.4017,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.65654543,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"3052","last_page":"3055"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/sine-wave","display_name":"Sine wave","score":0.8347845673561096},{"id":"https://openalex.org/keywords/harmonics","display_name":"Harmonics","score":0.6913917064666748},{"id":"https://openalex.org/keywords/spurious-free-dynamic-range","display_name":"Spurious-free dynamic range","score":0.617764413356781},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6133679151535034},{"id":"https://openalex.org/keywords/direct-digital-synthesizer","display_name":"Direct digital synthesizer","score":0.5983887314796448},{"id":"https://openalex.org/keywords/sine","display_name":"Sine","score":0.5812582969665527},{"id":"https://openalex.org/keywords/harmonic","display_name":"Harmonic","score":0.5778117775917053},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.47184327244758606},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4544132947921753},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4446662664413452},{"id":"https://openalex.org/keywords/frequency-multiplier","display_name":"Frequency multiplier","score":0.4373573660850525},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.43623781204223633},{"id":"https://openalex.org/keywords/fundamental-frequency","display_name":"Fundamental frequency","score":0.4277821183204651},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.38411611318588257},{"id":"https://openalex.org/keywords/frequency-synthesizer","display_name":"Frequency synthesizer","score":0.3419976532459259},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.31412020325660706},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.27134668827056885},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.25258690118789673},{"id":"https://openalex.org/keywords/acoustics","display_name":"Acoustics","score":0.22556433081626892},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.11840888857841492},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.10308071970939636}],"concepts":[{"id":"https://openalex.org/C66907618","wikidata":"https://www.wikidata.org/wiki/Q207527","display_name":"Sine wave","level":3,"score":0.8347845673561096},{"id":"https://openalex.org/C188414643","wikidata":"https://www.wikidata.org/wiki/Q3001183","display_name":"Harmonics","level":3,"score":0.6913917064666748},{"id":"https://openalex.org/C119293636","wikidata":"https://www.wikidata.org/wiki/Q657480","display_name":"Spurious-free dynamic range","level":3,"score":0.617764413356781},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6133679151535034},{"id":"https://openalex.org/C166089067","wikidata":"https://www.wikidata.org/wiki/Q1227465","display_name":"Direct digital synthesizer","level":5,"score":0.5983887314796448},{"id":"https://openalex.org/C186661526","wikidata":"https://www.wikidata.org/wiki/Q13647261","display_name":"Sine","level":2,"score":0.5812582969665527},{"id":"https://openalex.org/C127934551","wikidata":"https://www.wikidata.org/wiki/Q1148098","display_name":"Harmonic","level":2,"score":0.5778117775917053},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.47184327244758606},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4544132947921753},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4446662664413452},{"id":"https://openalex.org/C146002875","wikidata":"https://www.wikidata.org/wiki/Q1074289","display_name":"Frequency multiplier","level":3,"score":0.4373573660850525},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.43623781204223633},{"id":"https://openalex.org/C10513763","wikidata":"https://www.wikidata.org/wiki/Q1331774","display_name":"Fundamental frequency","level":2,"score":0.4277821183204651},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.38411611318588257},{"id":"https://openalex.org/C182099602","wikidata":"https://www.wikidata.org/wiki/Q2660678","display_name":"Frequency synthesizer","level":4,"score":0.3419976532459259},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.31412020325660706},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.27134668827056885},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.25258690118789673},{"id":"https://openalex.org/C24890656","wikidata":"https://www.wikidata.org/wiki/Q82811","display_name":"Acoustics","level":1,"score":0.22556433081626892},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.11840888857841492},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.10308071970939636},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas.2015.7169331","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2015.7169331","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7599999904632568,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W605762311","https://openalex.org/W1597620877","https://openalex.org/W2002600803","https://openalex.org/W2032839684","https://openalex.org/W2055513287","https://openalex.org/W2136817506","https://openalex.org/W2146970019","https://openalex.org/W2147084331","https://openalex.org/W2165812548","https://openalex.org/W2517720480","https://openalex.org/W4231501498","https://openalex.org/W4235930683","https://openalex.org/W6618523604"],"related_works":["https://openalex.org/W2166555237","https://openalex.org/W2622028395","https://openalex.org/W2093119242","https://openalex.org/W2769992427","https://openalex.org/W2178871507","https://openalex.org/W2085674059","https://openalex.org/W1967648323","https://openalex.org/W2563014579","https://openalex.org/W2026158243","https://openalex.org/W2008479635"],"abstract_inverted_index":{"An":[0],"on-chip":[1],"sine-wave":[2,66,92],"synthesizer":[3,93],"design":[4,15,72,85],"with":[5,46,73,98,130],"fast":[6],"programmability":[7],"and":[8],"low":[9,51,74],"hardware":[10,75],"cost":[11,76],"is":[12,95,120],"presented.":[13],"The":[14,39,61,83],"makes":[16],"use":[17,48],"of":[18,49,64,86,122,139],"a":[19,29,50,57,71,104,108],"harmonic":[20,37],"cancellation":[21],"technique":[22],"to":[23,28,55,125],"digitally":[24],"synthesize":[25,56],"an":[26],"approximation":[27],"sine-wave,":[30],"which":[31],"does":[32],"not":[33],"contain":[34],"lower":[35],"order":[36,42],"distortions.":[38],"remaining":[40],"higher":[41],"harmonics":[43],"are":[44],"attenuated":[45],"the":[47,65,87,117],"pass":[52],"filter":[53],"(LPF)":[54],"spectrally":[58],"pure":[59],"sine-wave.":[60],"simple":[62],"nature":[63],"synthesis":[67],"approach":[68],"allows":[69],"for":[70],"while":[77,134],"maintaining":[78],"high":[79],"output":[80,128],"spectral":[81],"purity.":[82],"generic":[84],"aptly":[88],"named":[89],"digital":[90],"harmonic-cancelling":[91],"(DHSS)":[94],"discussed":[96],"along":[97],"parasitic":[99],"extracted":[100],"simulation":[101],"results":[102,114],"from":[103],"prototype":[105,119],"designed":[106],"in":[107],"0.13":[109],"\u03bcm":[110],"CMOS":[111],"process.":[112],"Simulation":[113],"demonstrate":[115],"that":[116],"DHSS":[118],"capable":[121],"synthesizing":[123],"up":[124],"100":[126],"MHz":[127],"frequency,":[129],"43.5":[131],"dB":[132],"SFDR,":[133],"consuming":[135],"only":[136],"2.26":[137],"mW":[138],"power.":[140]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2016,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
